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Contents

README

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AMC1204BDWVR

Texas Instruments · Analog To Digital Converters (ADCs) · SOIC-8-300mil

AMC1204BDWVR from Texas Instruments, in a SOIC-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AVDD power_in High-side (analog) supply, specified at 4.5 V to 5.5 V (5 V nominal) referenced to AGND.
2 VINP input Noninverting analog input of the differential ±250 mV input range optimized for shunt resistors.
3 VINN input Inverting analog input of the differential ±250 mV input range, connected to the low side of the shunt resistor.
4 AGND power_in High-side ground reference for the isolated modulator, to which the floating shunt ground is connected.
5 DGND power_in Controller-side (digital) ground reference for the digital interface.
6 DATA output 1-bit modulator data output that feeds the external digital filter.
7 CLKIN input Modulator clock input, which can be driven at up to 20 MHz from the controller or system clock.
8 DVDD power_in Controller-side (digital) supply, specified at 2.7 V to 5.5 V (3.3 V nominal) referenced to DGND.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8-300mil
Category Data Converters
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, AVDD to AGND or DVDD to DGND -0.3 6 V 5
Input current to any pin except supply pins -10 10 mA 5
Maximum virtual junction temperature TJ 150 °C 5
Operating ambient temperature TOA -40 125 °C 5
Storage temperature Tstg -65 150 °C 5
Operating ambient temperature TA -40 105 °C 5
High-side (analog) supply voltage AVDD 4.5 5 5.5 V 5
Controller-side (digital) supply voltage DVDD 2.7 3.3 5.5 V 5
Integral linearity error INL -8 2 8 LSB TA = -40°C to 85°C 9
Integral linearity error INL -16 5 16 LSB TA = -40°C to 105°C 9
Differential nonlinearity DNL -1 1 LSB 9
Offset error VOS -1 0.1 1 mV 9
Offset error thermal drift TCVOS -3.5 1 3.5 μV/°C 9
Gain error GERR -2 0.5 2 % 9
Gain error thermal drift TCGERR -30 30 ppm/°C 9
Full-scale differential voltage input range (VINP, VINN) FSR -320 320 mV 9
Specified full-scale range FSR -250 250 mV 9
Operating common-mode signal VCM -160 mV 9
Input leakage current IIL -10 10 μA VINP, VINN = ±250 mV 9
Input leakage current IIL -50 50 μA VINP, VINN = ±320 mV 9
Clock period tCLKIN 45.5 50 200 ns 9
Input clock frequency fCLKIN 5 20 22 MHz 9
Duty cycle DutyCLKIN 40 50 60 % 5 MHz ≤ fCLKIN < 20 MHz 9
Duty cycle DutyCLKIN 45 50 55 % 20 MHz ≤ fCLKIN ≤ 22 MHz 9
Signal-to-noise + distortion SINAD 78 87 dB fIN = 1kHz, TA = -40°C to 85°C 9
Signal-to-noise + distortion SINAD 70 87 dB fIN = 1kHz, TA = -40°C to 105°C 9
Signal-to-noise ratio SNR 84 88 dB fIN = 1kHz, TA = -40°C to 85°C 9
Signal-to-noise ratio SNR 83 88 dB fIN = 1kHz, TA = -40°C to 105°C 9
Total harmonic distortion THD -96 -80 dB fIN = 1kHz, TA = -40°C to 85°C 9
Total harmonic distortion THD -96 -70 dB fIN = 1kHz, TA = -40°C to 105°C 9
Spurious-free dynamic range SFDR 82 96 dB fIN = 1kHz, TA = -40°C to 85°C 9
Spurious-free dynamic range SFDR 72 96 dB fIN = 1kHz, TA = -40°C to 105°C 9
Input current IIN -10 10 μA VIN = DVDD to DGND 9
Low-level input voltage (CMOS with Schmitt-trigger) VIL -0.3 V DVDD = 4.5 V to 5.5 V 9
High-level input voltage (LVCMOS) VIH 2 V DVDD = 2.7 V to 3.6 V 9
Low-level input voltage (LVCMOS) VIL -0.3 0.8 V DVDD = 2.7 V to 3.6 V 10
High-side supply voltage AVDD 4.5 5 5.5 V 10
Controller-side supply voltage DVDD 2.7 3.3 5.5 V 10
High-side supply current IAVDD 11 16 mA 4.5 V ≤ AVDD ≤ 5.5 V 10
Controller-side supply current IDVDD 2 4 mA 2.7 V ≤ DVDD ≤ 3.6 V 10
Controller-side supply current IDVDD 2.8 5 mA 4.5 V ≤ DVDD ≤ 5.5 V 10
Power dissipation PD 61.6 102.4 mW AVDD = 5.5 V, DVDD = 3.6 V 10
CLKIN clock period tCLK 45.5 50 200 ns 10
CLKIN clock high time tHIGH 20 25 120 ns 10
CLKIN clock low time tLOW 20 25 120 ns 10
Delayed falling edge of CLKIN to DATA valid tD 2 15 ns 10
Junction-to-ambient thermal resistance RθJA 106.5 °C/W DWV (SOIC) 8-pin package 5
Junction-to-case (top) thermal resistance RθJC(top) 53.6 °C/W DWV (SOIC) 8-pin package 5
Junction-to-board thermal resistance RθJB 60.3 °C/W DWV (SOIC) 8-pin package 5
Junction-to-top characterization parameter ψJT 18.5 °C/W DWV (SOIC) 8-pin package 5
Junction-to-board characterization parameter ψJB 58.9 °C/W DWV (SOIC) 8-pin package 5

CAD (KiCad official)

  • Symbol: AMC1204BDWVR
  • Footprint: Package_SO:SOIC-8_7.5x5.85mm_P1.27mm
  • 3D model: SOIC-8-300mil (KiCad packages3D, STEP)
  • 3D model files: amc1204bdwvr-etched.step / amc1204bdwvr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); amc1204bdwvr.step / amc1204bdwvr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 59b4ffc6b2b9478a, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF