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ATSAM4S2BA-AU
Public Made by Adomby adom
Microchip Tech MICROCHIP, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownATSAM4S2BA-AU
Microchip Tech · MICROCHIP · LQFP-64(10x10)
ATSAM4S2BA-AU from Microchip Tech, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ADVREF | power_in | Reference voltage shared by the ADC, DAC and analog comparator. |
| 2 | GND | power_in | Ground. |
| 3 | PB0/AD4 | bidirectional | PIO line PB0 with analog input AD4. |
| 4 | PB1/AD5 | bidirectional | PIO line PB1 with analog input AD5. |
| 5 | PB2/AD6 | bidirectional | PIO line PB2 with analog input AD6. |
| 6 | PB3/AD7 | bidirectional | PIO line PB3 with analog input AD7. |
| 7 | VDDIN | power_in | Voltage regulator input and ADC, DAC and analog comparator supply, 1.62 to 3.6 V. |
| 8 | VDDOUT | power_out | Output of the internal voltage regulator. |
| 9 | PA17/PGMD5/AD0 | bidirectional | PIO line PA17 with FFPI data PGMD5 and analog input AD0. |
| 10 | PA18/PGMD6/AD1 | bidirectional | PIO line PA18 with FFPI data PGMD6 and analog input AD1. |
| 11 | PA21/PGMD9/AD8 | bidirectional | PIO line PA21 with FFPI data PGMD9 and analog input AD8. |
| 12 | VDDCORE | power_in | Core supply, 1.08 to 1.32 V. |
| 13 | PA19/PGMD7/AD2 | bidirectional | PIO line PA19 with FFPI data PGMD7 and analog input AD2. |
| 14 | PA22/PGMD10/AD9 | bidirectional | PIO line PA22 with FFPI data PGMD10 and analog input AD9. |
| 15 | PA23/PGMD11 | bidirectional | PIO line PA23 with FFPI data PGMD11. |
| 16 | PA20/PGMD8/AD3 | bidirectional | PIO line PA20 with FFPI data PGMD8 and analog input AD3. |
| 17 | GND | power_in | Ground. |
| 18 | VDDIO | power_in | I/O lines supply, 1.62 to 3.6 V. |
| 19 | PA16/PGMD4 | bidirectional | PIO line PA16 with FFPI data PGMD4. |
| 20 | PA15/PGMD3 | bidirectional | PIO line PA15 with FFPI data PGMD3. |
| 21 | PA14/PGMD2 | bidirectional | PIO line PA14 with FFPI data PGMD2. |
| 22 | PA13/PGMD1 | bidirectional | PIO line PA13 with FFPI data PGMD1. |
| 23 | PA24/PGMD12 | bidirectional | PIO line PA24 with FFPI data PGMD12. |
| 24 | VDDCORE | power_in | Core supply, 1.08 to 1.32 V. |
| 25 | PA25/PGMD13 | bidirectional | PIO line PA25 with FFPI data PGMD13. |
| 26 | PA26/PGMD14 | bidirectional | PIO line PA26 with FFPI data PGMD14. |
| 27 | PA12/PGMD0 | bidirectional | PIO line PA12 with FFPI data PGMD0. |
| 28 | PA11/PGMM3 | bidirectional | PIO line PA11 with FFPI mode input PGMM3. |
| 29 | PA10/PGMM2 | bidirectional | PIO line PA10 with FFPI mode input PGMM2. |
| 30 | PA9/PGMM1 | bidirectional | PIO line PA9 with FFPI mode input PGMM1. |
| 31 | PA8/XOUT32/PGMM0 | bidirectional | PIO line PA8 with 32 kHz crystal output XOUT32 and FFPI mode input PGMM0. |
| 32 | PA7/XIN32/PGMNVALID | bidirectional | PIO line PA7 with 32 kHz crystal input XIN32 and FFPI data direction output PGMNVALID. |
| 33 | TDI/PB4 | bidirectional | JTAG test data input shared with PIO line PB4. |
| 34 | PA6/PGMNOE | bidirectional | PIO line PA6 with FFPI read input PGMNOE. |
| 35 | PA5/PGMRDY | bidirectional | PIO line PA5 with FFPI programming ready output PGMRDY. |
| 36 | PA4/PGMNCMD | bidirectional | PIO line PA4 with FFPI command input PGMNCMD. |
| 37 | PA27/PGMD15 | bidirectional | PIO line PA27 with FFPI data PGMD15. |
| 38 | PA28 | bidirectional | PIO line PA28. |
| 39 | NRST | bidirectional | Active-low microcontroller reset input/output. |
| 40 | TST | input | Test select input with an internal pull-down of about 15 kΩ; low at power-up selects normal operating mode and high selects test or FFPI mode. |
| 41 | PA29 | bidirectional | PIO line PA29. |
| 42 | PA30 | bidirectional | PIO line PA30. |
| 43 | PA3 | bidirectional | PIO line PA3. |
| 44 | PA2/PGMEN2 | bidirectional | PIO line PA2 with FFPI programming enable input PGMEN2. |
| 45 | VDDIO | power_in | I/O lines supply, 1.62 to 3.6 V. |
| 46 | GND | power_in | Ground. |
| 47 | PA1/PGMEN1 | bidirectional | PIO line PA1 with FFPI programming enable input PGMEN1. |
| 48 | PA0/PGMEN0 | bidirectional | PIO line PA0 with FFPI programming enable input PGMEN0. |
| 49 | TDO/TRACESWO/PB5 | bidirectional | JTAG test data output or asynchronous trace output TRACESWO, shared with PIO line PB5. |
| 50 | JTAGSEL | input | Active-high JTAG selection input. |
| 51 | TMS/SWDIO/PB6 | bidirectional | JTAG test mode select or serial wire data I/O, shared with PIO line PB6. |
| 52 | PA31 | bidirectional | PIO line PA31. |
| 53 | TCK/SWCLK/PB7 | bidirectional | JTAG test clock or serial wire clock, shared with PIO line PB7. |
| 54 | VDDCORE | power_in | Core supply, 1.08 to 1.32 V. |
| 55 | ERASE/PB12 | bidirectional | Flash erase input shared with PIO line PB12. |
| 56 | DDM/PB10 | bidirectional | USB full-speed data minus shared with PIO line PB10. |
| 57 | DDP/PB11 | bidirectional | USB full-speed data plus shared with PIO line PB11. |
| 58 | VDDIO | power_in | I/O lines supply, 1.62 to 3.6 V. |
| 59 | PB13/DAC0 | bidirectional | PIO line PB13 with DAC analog output DAC0. |
| 60 | GND | power_in | Ground. |
| 61 | XOUT/PB8 | bidirectional | 3 to 20 MHz oscillator output shared with PIO line PB8. |
| 62 | XIN/PGMCK/PB9 | bidirectional | 3 to 20 MHz oscillator input with FFPI clock PGMCK, shared with PIO line PB9. |
| 63 | PB14/DAC1 | bidirectional | PIO line PB14 with DAC analog output DAC1. |
| 64 | VDDPLL | power_in | Supply for PLLA, PLLB, the fast RC and the 3 to 20 MHz oscillator, 1.08 to 1.32 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDDIO supply voltage range | VDDIO | 1.62 | 3.6 | V | Powers peripheral I/O lines, second Flash rail, USB transceiver, backup part, 32 kHz oscillator | 27 | |
| VDDIN supply voltage range | VDDIN | 1.62 | 3.6 | V | Voltage regulator input, ADC, DAC and analog comparator supply | 27 | |
| VDDCORE supply voltage range | VDDCORE | 1.08 | 1.32 | V | Powers core, first flash rail, embedded memories and peripherals | 27 | |
| VDDPLL supply voltage range | VDDPLL | 1.08 | 1.32 | V | Powers PLLA, PLLB, fast RC and 3 to 20 MHz oscillator | 27 | |
| Operating temperature range | -40 | 85 | °C | Industrial, ATSAM4S2BA-AU / ATSAM4S2BB-AU | 1222 | ||
| Maximum CPU operating speed | 120 | MHz | Maximum speed of SAM4S series | 1 | |||
| Voltage regulator default output voltage | VDDOUT | 1.2 | V | Default output voltage | 28 | ||
| Voltage regulator static current, Normal mode | 500 | µA | Normal mode, drawing 80 mA output current (printed as less than 500 µA) | 28 | |||
| Voltage regulator current, Backup mode | 1 | µA | Backup mode (printed as less than 1 µA) | 28 | |||
| I/O internal pull-up/pull-down resistance | 100 | kΩ | Typical value for all I/Os | 35 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | before performing the calculation, making the base address for the calculation word-aligned. ̶ Note: To generate the address of an instruction, the constant based on the value of the PC must be | 118 |
CAD (KiCad official)
- Symbol:
ATSAM4S2BA-AU - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
atsam4s2ba-au-etched.step/atsam4s2ba-au-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsam4s2ba-au.step/atsam4s2ba-au.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1269 pp, sha256
64941c58dfa3899c, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).