component
DMTH6016LSD-13
Public Made by Adomby adom
Diodes Incorporated MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownDMTH6016LSD-13
Diodes Incorporated · MOSFETs · SO-8
DMTH6016LSD-13 from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1; the maximum continuous body diode forward current is IS = 1.7 A and the pulsed body diode current is ISM = 40 A (10µs pulse, 1% duty cycle). |
| 2 | G1 | input | Gate of MOSFET 1; the gate-source voltage rating is VGSS = ±20 V. |
| 3 | S2 | passive | Source of MOSFET 2; the maximum continuous body diode forward current is IS = 1.7 A and the pulsed body diode current is ISM = 40 A (10µs pulse, 1% duty cycle). |
| 4 | G2 | input | Gate of MOSFET 2; the gate-source voltage rating is VGSS = ±20 V. |
| 5 | D2 | passive | Drain of MOSFET 2; the drain-source voltage rating is VDSS = 60 V and the continuous drain current is 7.6 A at VGS = 10V, TA = +25°C. |
| 6 | D2 | passive | Drain of MOSFET 2; the drain-source voltage rating is VDSS = 60 V and the continuous drain current is 7.6 A at VGS = 10V, TA = +25°C. |
| 7 | D1 | passive | Drain of MOSFET 1; the drain-source voltage rating is VDSS = 60 V and the continuous drain current is 7.6 A at VGS = 10V, TA = +25°C. |
| 8 | D1 | passive | Drain of MOSFET 1; the drain-source voltage rating is VDSS = 60 V and the continuous drain current is 7.6 A at VGS = 10V, TA = +25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | 60 | V | 2 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 2 | ||
| Continuous Drain Current (Note 6), TA = +25°C | ID | 7.6 | A | VGS = 10V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 6), TA = +100°C | ID | 5.4 | A | VGS = 10V, TA = +100°C | 2 | ||
| Continuous Drain Current (Note 6), TA = +25°C | ID | 6.2 | A | VGS = 4.5V, TA = +25°C | 2 | ||
| Continuous Drain Current (Note 6), TA = +100°C | ID | 4.4 | A | VGS = 4.5V, TA = +100°C | 2 | ||
| Pulsed Drain Current | IDM | 40 | A | 10μs pulse, duty cycle = 1% | 2 | ||
| Maximum Continuous Body Diode Forward Current | IS | 1.7 | A | 2 | |||
| Pulsed Body Diode Forward Current | ISM | 40 | A | 10μs pulse, duty cycle = 1% | 2 | ||
| Avalanche Current | IAS | 15.3 | A | L = 0.1mH | 2 | ||
| Avalanche Energy | EAS | 11.7 | mJ | L = 0.1mH | 2 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 175 | °C | 2 | ||
| Total Power Dissipation (Note 5) | PD | 1.4 | W | Note 5: device on FR-4 PC board, minimum recommended pad layout, single sided | 2 | ||
| Total Power Dissipation (Note 6) | PD | 1.9 | W | Note 6: FR-4 substrate, 2oz copper, thermal bias to bottom layer 1 inch square copper plate | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 5) | RJA | 103 | °C/W | Note 5: device on FR-4 PC board, minimum recommended pad layout, single sided | 2 | ||
| Thermal Resistance, Junction to Ambient (Note 6) | RJA | 77 | °C/W | Note 6: FR-4 substrate, 2oz copper, thermal bias to bottom layer 1 inch square copper plate | 2 | ||
| Thermal Resistance, Junction to Case | RJC | 14.5 | °C/W | 2 | |||
| Drain-Source Breakdown Voltage | BVDSS | 60 | V | VGS = 0V, ID = 250µA | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | 1 | µA | VDS = 48V, VGS = 0V | 2 | ||
| Gate-Source Leakage | IGSS | -100 | 100 | nA | VGS = ±20V, VDS = 0V | 2 | |
| Gate Threshold Voltage | VGS(TH) | 1 | 2.5 | V | VDS = VGS, ID = 250µA | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 15 | 19.5 | mΩ | VGS = 10V, ID = 10A | 2 | |
| Static Drain-Source On-Resistance | RDS(ON) | 21 | 28 | mΩ | VGS = 4.5V, ID = 6A | 2 | |
| Diode Forward Voltage | VSD | 0.7 | 1.2 | V | VGS = 0V, IS = 1A | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper | tin | Terminals: Finish Matte Tin Annealed over Copper Leadframe. | 1 |
CAD (KiCad official)
- Symbol:
DMTH6016LSD-13 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
dmth6016lsd-13-etched.step/dmth6016lsd-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dmth6016lsd-13.step/dmth6016lsd-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (7 pp, sha256
ce86b6c367d21318, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).