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SSP7786
Public Made by Adomby adom
Shanghai Siproin Microelectronics Linear Voltage Regulators (LDO), SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSSP7786
Shanghai Siproin Microelectronics · Linear Voltage Regulators (LDO) · SOP-8
SSP7786 from Shanghai Siproin Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOT1 | power_out | LDO second output voltage, equal to 0.66×VOUT. |
| 2 | GND | power_in | Ground. |
| 3 | VOUT | power_out | LDO output voltage, internally set to 5V, 3.3V or 2.7V depending on the part variant, with a typical current limit of 138mA shared with VOT1. |
| 4 | VDD | power_in | Voltage input supply used for energy storage; connect a capacitor to GND to transfer the input energy to the LDO output stage (absolute maximum 9V, VDD_ON 7.8V typical). |
| 5 | Drain | passive | Internal 650V power MOSFET drain that provides energy to the later stage when the input voltage drops into the charging window; connect pins 5-8 together. |
| 6 | Drain | passive | Internal 650V power MOSFET drain that provides energy to the later stage when the input voltage drops into the charging window; connect pins 5-8 together. |
| 7 | Drain | passive | Internal 650V power MOSFET drain that provides energy to the later stage when the input voltage drops into the charging window; connect pins 5-8 together. |
| 8 | Drain | passive | Internal 650V power MOSFET drain that provides energy to the later stage when the input voltage drops into the charging window; connect pins 5-8 together. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage 5V option | VOUT_5V | 4.9 | 5 | 5.1 | V | Internal setting | 4 |
| Output Voltage 3.3V option | VOUT_3.3V | 3.2 | 3.3 | 3.4 | V | Internal setting | 4 |
| Output Voltage 2.7V option | VOUT_2.7V | 2.65 | 2.7 | 2.75 | V | Internal setting | 4 |
| VDD Threshold | VDD_ON | 7.6 | 7.8 | 8 | V | 4 | |
| VDD OVP Threshold | VDD_OVP | 7.6 | 7.8 | 8 | V | 4 | |
| VDD OVP Threshold Hysteresis | VDD_OVP_hys | 6.3 | 6.5 | 6.7 | V | 4 | |
| Output Current Limit | ILIM | 100 | 138 | 160 | mA | 4 | |
| Output Under Voltage Protection | VUVP | 10 | 12.5 | 15 | % | 4 | |
| HV Supply Current | IHV | 5 | 10 | mA | HV=600V, VDD=3V | 3 | |
| HV Leakage Current | IHV_leakage | 20 | μA | HV=600V, VDD=8.5V | 3 | ||
| Drain Source Breakdown Voltage | VBR | 650 | V | 3 | |||
| Drain Voltage | VDrain | 650 | V | Ta=25℃ | 3 | ||
| VDD Supply Voltage | VDD | 9 | V | Ta=25℃ | 3 | ||
| VDD Clamp Current | 10 | mA | Ta=25℃ | 3 | |||
| VOUT Voltage | VOUT | -0.3 | 7 | V | Ta=25℃ | 3 | |
| Maximum Junction Temperature | Tj | 150 | ℃ | 3 | |||
| Operating Temperature Range | Tamb | -40 | 85 | ℃ | 3 | ||
| Storage Temperature Range | Tstg | -65 | 150 | ℃ | 3 | ||
| Lead Temperature | 260 | ℃ | Soldering, 10sec. | 3 | |||
| ESD HBM | HBM | 3 | KV | Human Body Model | 3 | ||
| ESD MM | MM | 250 | V | Machine Model | 3 | ||
| Package Thermal Resistance (SOP-8) | Rja(SOP8) | 165 | ℃/W | 3 | |||
| AC Synchronization Turn-off Voltage | VAC_sync_OFF | 50 | V | 3 | |||
| VDD Operating Current | IVDD_Op | 1.4 | mA | Iout=1mA | 4 | ||
| VDD Under Voltage Threshold | VDD_OFF | 1.2 | V | 4 | |||
| Line Regulation | ΔVOUT(VIN) | 0.2 | %/V | Iout=100μA | 4 | ||
| Power Supply Rejection Ratio | PSRR | 60 | dB | Iout=30mA, Cout=4.7μF, f=10Hz to 60KHz | 4 | ||
| Thermal Shutdown Threshold | TSD | 160 | ℃ | 4 | |||
| Thermal Shutdown Recovery | TRC | 140 | ℃ | 4 |
CAD (KiCad official)
- Symbol:
SSP7786 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ssp7786-etched.step/ssp7786-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp7786.step/ssp7786.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (10 pp, sha256
a7adb1d4b322f491, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).