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CD74AC86M96
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD74AC86M96
Texas Instruments · Logic Gates · SOIC-14
CD74AC86M96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 data input A; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 2 | 1B | input | Gate 1 data input B; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 3 | 1Y | output | Gate 1 exclusive-OR output, specified at IOL = 24 mA and IOH = -24 mA with VCC = 4.5 V to 5.5 V and output voltage limited to 0 V to VCC. |
| 4 | 2A | input | Gate 2 data input A; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 5 | 2B | input | Gate 2 data input B; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 6 | 2Y | output | Gate 2 exclusive-OR output, specified at IOL = 24 mA and IOH = -24 mA with VCC = 4.5 V to 5.5 V and output voltage limited to 0 V to VCC. |
| 7 | GND | power_in | Ground reference for the device supply and logic levels. |
| 8 | 3Y | output | Gate 3 exclusive-OR output, specified at IOL = 24 mA and IOH = -24 mA with VCC = 4.5 V to 5.5 V and output voltage limited to 0 V to VCC. |
| 9 | 3A | input | Gate 3 data input A; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 10 | 3B | input | Gate 3 data input B; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 11 | 4Y | output | Gate 4 exclusive-OR output, specified at IOL = 24 mA and IOH = -24 mA with VCC = 4.5 V to 5.5 V and output voltage limited to 0 V to VCC. |
| 12 | 4A | input | Gate 4 data input A; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 13 | 4B | input | Gate 4 data input B; inputs must stay within 0 V to VCC, and unused inputs must be held at VCC or GND for proper operation. |
| 14 | VCC | power_in | Positive supply; recommended operating range is 1.5 V to 5.5 V, with absolute maximum supply range -0.5 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
CD74AC86M96 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd74ac86m96-etched.step/cd74ac86m96-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd74ac86m96.step/cd74ac86m96.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
641785a85fe3c13f, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).