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Contents

README

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NCP1589AMNTWG

onsemi · DC-DC Converters · DFN-10(3x3)

NCP1589AMNTWG from onsemi, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT power_in Supply rail for the floating top gate driver, fed through an external diode (cathode to BOOT) with a 0.1 µF to 1 µF CBOOT capacitor to LX placed near the IC; rated 35 V wrt GND maximum.
2 LX passive Switch node and reference for the floating top gate driver, connected to the source of the top MOSFET and used to sense the low-side MOSFET drop for overcurrent protection.
3 UG output Top gate MOSFET driver output, connected to the gate of the top N-channel MOSFET.
4 LG output Bottom gate MOSFET driver output, connected to the gate of the bottom N-channel MOSFET; it also sources 10 µA at startup into the ROCSET resistor to ground to set the overcurrent threshold.
5 GND power_in IC ground reference to which all control circuits are referenced.
6 VCC power_in Supply rail for the internal circuitry, operating range 4.5 V to 13.2 V, decoupled with a 1 µF capacitor to GND placed near the IC.
7 COMP/DISB bidirectional Error amplifier output and PWM comparator non-inverting input used with FB to compensate the voltage-control loop; pull low to disable the device.
8 FB input Inverting input of the error amplifier, connected to the output resistor divider or directly to Vout, regulated to 0.8 V; maximum 5.0 V.
9 VOS input Voltage offset sense input monitored for power good, overvoltage and undervoltage; regulated to 0.8 V like FB, maximum 5.0 V.
10 PGOOD output Open-drain power good output with no internal pull-up, pulled low if VOS is outside ±10% of the 0.8 V Vref; maximum 7 V.
11 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package DFN-10(3x3)
Category Power Management ICs
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Quiescent Supply Current (NCP1589A) 1 8 mA VFB = 1.0 V, No Switching, VCC = 13.2 V 4
VCC Voltage Range VCC 4.5 13.2 V 4
Boost Voltage Range 4.5 30 V 13.2 V wrt LX 4
UVLO Threshold Rising 3.8 4 4.2 V VCC Rising 4
UVLO Threshold Falling 3.4 3.6 3.8 V VCC Falling 4
Feedback Voltage VFB 0.7936 0.8 0.8064 V FB Tied to Comp. Measure FB Pin. 4
Oscillator Frequency (NCP1589A) 270 300 330 kHz 4
Maximum Duty Cycle 70 75 80 % 4
Open Loop DC Gain 70 80 dB Note 1 4
Input Offset Voltage -2 0 2 mV Note 1 4
Input Bias Current 0.1 1 A 4
Disable Threshold 0.6 0.8 V 4
Output Source Current During Disable 10 40 A 4
UG Falling to LG Rising Delay 12.4 18 ns VCC = 12 V, UG−LX < 2.0 V, LG > 2.0 V 4
LG Falling to UG Rising Delay 12.4 18 ns VCC = 12 V, LG < 2.0 V, UG > 2.0 V 4
Soft-Start time 3 7 ms 4
PGOOD Output Voltage Logic Low 0.4 V Sinking 4 mA 4
OVP Threshold to PGOOD Output Low 0.88 1 V Ramp VOS from 0.7 to 1.2. Monitor when PGOOD goes Low 4
OVP Threshold to Part Disable 1 1.2 V Ramp VOS from 0.8 to 1.2. Monitor when outputs disable 4
UVP Threshold to PGOOD Output Low 0.65 0.72 V Ramp VOS from 800 mV to 500 mV. Monitor when PGOOD goes Low 4
UVP Threshold to Part Disable 0.5 0.6 V Ramp VOS from 800 mV to 500 mV. Monitor when outputs stop switching 4
OC Current Source 9 10 11 A Sourced from LG pin, before SS; Note 1 4
Supply Voltage Input VCC -0.3 15 V 3
Bootstrap Supply Voltage wrt GND BOOT -0.3 35 V 40 V < 100 ns 3
Bootstrap Supply Voltage wrt LX BOOT -0.3 15 V wrt/LX 3
Switching Node Voltage LX -5 35 V 40 V for < 100 ns; −10 V for < 200 ns 3
High-Side Driver Output wrt GND UG 30 V wrt/GND; 40 V for < 100 ns 3
High-Side Driver Output wrt LX UG -0.3 15 V wrt/LX; −2 V for < 200 ns 3
Low-Side Driver Output LG -0.3 V Max VCC + 0.3 V; −5 V for < 200 ns 3
Feedback, VOS FB, VOS -0.3 5 V 3
COMP/DISB -0.3 3.6 V 3
PGOOD -0.3 7 V 3
Thermal Resistance, Junction-to-Ambient RθJA 165 °C/W 3
Thermal Resistance, Junction-to-Case RθJC 45 °C/W 3
Operating Junction Temperature Range TJ 0 150 °C 3
Operating Ambient Temperature Range TA 0 70 °C 3
Storage Temperature Range Tstg -55 150 °C 3
Boost Quiescent Current 0.1 A VFB = 1.0 V, No Switching 4
UVLO Hysteresis 0.4 V VCC Rising or VCC Falling 4
Ramp-Amplitude Voltage 1.1 V 4
LG Minimum on Time 500 ns 4
Unity Gain Bandwidth 15 Mhz Note 1 4

CAD (KiCad official)

  • Symbol: NCP1589AMNTWG
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10(3x3) (KiCad packages3D, STEP)
  • 3D model files: ncp1589amntwg-etched.step / ncp1589amntwg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncp1589amntwg.step / ncp1589amntwg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (10 pp, sha256 4cfcc6af5f821801, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF