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README

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CD4059AM

Texas Instruments · Counters, Dividers · SOIC-24

CD4059AM from Texas Instruments, in a SOIC-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CL input Clock input that the down-counter uses, with a maximum clock input frequency of 1.5 MHz at 5 V and 3 MHz at 10 V.
2 L input Latch Enable input: a 1 makes the counter output remain high once an output pulse occurs, and the output returns to 0 when the latch input returns to 0.
3 J1 input Jam input J1 (least significant bit of the first counting section preset), with input voltage range -0.5 V to VDD+0.5 V.
4 J2 input Jam preset input J2 for the first counting section, with input voltage range -0.5 V to VDD+0.5 V.
5 J3 input Jam preset input J3 for the first counting section, with input voltage range -0.5 V to VDD+0.5 V.
6 J4 input Jam preset input J4 (most significant bit of the first counting section preset), with input voltage range -0.5 V to VDD+0.5 V.
7 J16 input Jam preset input J16 for the intermediate counting decades (BCD, J13 to J16), with input voltage range -0.5 V to VDD+0.5 V.
8 J15 input Jam preset input J15 for the intermediate counting decades (BCD, J13 to J16), with input voltage range -0.5 V to VDD+0.5 V.
9 J14 input Jam preset input J14 for the intermediate counting decades (BCD, J13 to J16), with input voltage range -0.5 V to VDD+0.5 V.
10 J13 input Jam preset input J13 for the intermediate counting decades (BCD, J13 to J16), with input voltage range -0.5 V to VDD+0.5 V.
11 Kc input Mode-select input Kc, which together with Ka and Kb sets the divide-by modulus of the first and last counting sections per Table I.
12 VSS power_in Ground (VSS) reference terminal; supply voltage is specified relative to VSS.
13 Kb input Mode-select input Kb, which together with Ka and Kc sets the divide-by modulus per Table I; Kb=0 and Kc=0 select master preset mode.
14 Ka input Mode-select input Ka, which together with Kb and Kc sets the divide-by modulus of the first and last counting sections per Table I.
15 J12 input Jam preset input J12 for the intermediate counting decades (BCD, J9 to J12), with input voltage range -0.5 V to VDD+0.5 V.
16 J11 input Jam preset input J11 for the intermediate counting decades (BCD, J9 to J12), with input voltage range -0.5 V to VDD+0.5 V.
17 J10 input Jam preset input J10 for the intermediate counting decades (BCD, J9 to J12), with input voltage range -0.5 V to VDD+0.5 V.
18 J9 input Jam preset input J9 for the intermediate counting decades (BCD, J9 to J12), with input voltage range -0.5 V to VDD+0.5 V.
19 J8 input Jam preset input J8 for the intermediate counting decades (BCD, J5 to J8), with input voltage range -0.5 V to VDD+0.5 V.
20 J7 input Jam preset input J7 for the intermediate counting decades (BCD, J5 to J8), with input voltage range -0.5 V to VDD+0.5 V.
21 J6 input Jam preset input J6 for the intermediate counting decades (BCD, J5 to J8), with input voltage range -0.5 V to VDD+0.5 V.
22 J5 input Jam preset input J5 for the intermediate counting decades (BCD, J5 to J8), with input voltage range -0.5 V to VDD+0.5 V.
23 OUT output Divide-by-N output: a pulse one clock-cycle wide at the input frequency divided by N, with TTL drive capability.
24 VDD power_in Positive supply with a recommended operating range of 3 V to 12 V and an absolute maximum of -0.5 V to +15 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-24
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: CD4059AM
  • Footprint: Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm
  • 3D model: SOIC-24 (KiCad packages3D, STEP)
  • 3D model files: cd4059am-etched.step / cd4059am-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd4059am.step / cd4059am.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (12 pp, sha256 41ee8faa63ef9545, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF