component
SH8ME5TB1
Public Made by Adomby adom
ROHM Semicon MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSH8ME5TB1
ROHM Semicon · MOSFETs · SOP-8
SH8ME5TB1 from ROHM Semicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of Tr1 (Nch) MOSFET, rated VDSS 100V and ID ±4.5A. |
| 2 | G1 | input | Gate of Tr1 (Nch) MOSFET, VGSS maximum ±20V with threshold 1.0 to 2.5V. |
| 3 | S2 | passive | Source of Tr2 (Pch) MOSFET, rated VDSS -100V and ID ±4.5A. |
| 4 | G2 | input | Gate of Tr2 (Pch) MOSFET, VGSS maximum ±20V with threshold -1.0 to -2.5V. |
| 5 | D2 | passive | Drain of Tr2 (Pch) MOSFET, connected internally with pin 6, VDSS -100V. |
| 6 | D2 | passive | Drain of Tr2 (Pch) MOSFET, connected internally with pin 5, VDSS -100V. |
| 7 | D1 | passive | Drain of Tr1 (Nch) MOSFET, connected internally with pin 8, VDSS 100V. |
| 8 | D1 | passive | Drain of Tr1 (Nch) MOSFET, connected internally with pin 7, VDSS 100V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ROHM Semicon |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain - Source voltage (Tr1 Nch) | VDSS | 100 | V | 1 | |||
| Drain - Source voltage (Tr2 Pch) | VDSS | -100 | V | 1 | |||
| Continuous drain current (Tr1 Nch) | ID | -4.5 | 4.5 | A | 1 | ||
| Continuous drain current (Tr2 Pch) | ID | -4.5 | 4.5 | A | 1 | ||
| Pulsed drain current (Tr1 Nch) | IDP | -18 | 18 | A | Pw ≤ 10μs, Duty cycle ≤ 1% | 1 | |
| Pulsed drain current (Tr2 Pch) | IDP | -18 | 18 | A | Pw ≤ 10μs, Duty cycle ≤ 1% | 1 | |
| Gate - Source voltage (Tr1 Nch) | VGSS | -20 | 20 | V | 1 | ||
| Gate - Source voltage (Tr2 Pch) | VGSS | -20 | 20 | V | 1 | ||
| Avalanche current, single pulse (Tr1 Nch) | IAS | 4.5 | A | *2 Tr1: L ⋍ 0.1mH, VDD = 50V, RG = 25Ω, Starting Tj = 25℃ | 1 | ||
| Avalanche current, single pulse (Tr2 Pch) | IAS | -4.5 | A | *2 Tr2: L ⋍ 0.1mH, VDD = -50V, RG = 25Ω, Starting Tj = 25℃ | 1 | ||
| Avalanche energy, single pulse (Tr1 Nch) | EAS | 1.6 | mJ | *2 Tr1: L ⋍ 0.1mH, VDD = 50V, RG = 25Ω, Starting Tj = 25℃ | 1 | ||
| Avalanche energy, single pulse (Tr2 Pch) | EAS | 1.4 | mJ | *2 Tr2: L ⋍ 0.1mH, VDD = -50V, RG = 25Ω, Starting Tj = 25℃ | 1 | ||
| Power dissipation total | PD | 2 | W | *3 Mounted on a ceramic board (30×30×0.8mm) | 1 | ||
| Power dissipation total | PD | 1.4 | W | *4 Mounted on a Cu board (40×40×0.8mm) | 1 | ||
| Junction temperature | Tj | 150 | ℃ | 1 | |||
| Operating junction and storage temperature range | Tstg | -55 | 150 | ℃ | 1 | ||
| Thermal resistance, junction - ambient total | RthJA | 62.5 | ℃/W | *3 Mounted on a ceramic board (30×30×0.8mm) | 2 | ||
| Thermal resistance, junction - ambient total | RthJA | 89.2 | ℃/W | *4 Mounted on a Cu board (40×40×0.8mm) | 2 | ||
| Drain - Source breakdown voltage (Tr1 Nch) | V(BR)DSS | 100 | V | VGS = 0V, ID = 1mA | 2 | ||
| Drain - Source breakdown voltage (Tr2 Pch) | V(BR)DSS | -100 | V | VGS = 0V, ID = -1mA | 2 | ||
| Zero gate voltage drain current (Tr1 Nch) | IDSS | 1 | μA | VDS = 100V, VGS = 0V | 2 | ||
| Zero gate voltage drain current (Tr2 Pch) | IDSS | -1 | μA | VDS = -100V, VGS = 0V | 2 | ||
| Gate - Source leakage current (Tr1 Nch) | IGSS | -100 | 100 | nA | VGS = ±20V, VDS = 0V | 2 | |
| Gate - Source leakage current (Tr2 Pch) | IGSS | -100 | 100 | nA | VGS = ±20V, VDS = 0V | 2 | |
| Gate threshold voltage (Tr1 Nch) | VGS(th) | 1 | 2.5 | V | VDS = VGS, ID = 1mA | 2 | |
| Gate threshold voltage (Tr2 Pch) | VGS(th) | -1 | -2.5 | V | VDS = VGS, ID = -1mA | 2 | |
| Static drain - source on-state resistance (Tr1 Nch) | RDS(on) | 58 | mΩ | VGS = 10V, ID = 4.5A; *5 Pulsed | 2 | ||
| Static drain - source on-state resistance (Tr1 Nch) | RDS(on) | 84 | mΩ | VGS = 4.5V, ID = 4.5A; *5 Pulsed | 2 | ||
| Static drain - source on-state resistance (Tr2 Pch) | RDS(on) | 91 | mΩ | VGS = -10V, ID = -4.5A; *5 Pulsed | 2 | ||
| Static drain - source on-state resistance (Tr2 Pch) | RDS(on) | 96 | mΩ | VGS = -4.5V, ID = -4.5A; *5 Pulsed | 2 | ||
| Forward transfer admittance (Tr1 Nch) | /Yfs/ | 3.8 | S | VDS = 5V, ID = 4.5A; *5 Pulsed | 2 | ||
| Forward transfer admittance (Tr2 Pch) | /Yfs/ | 7 | S | VDS = -5V, ID = -4.5A; *5 Pulsed | 2 | ||
| Continuous forward current (Tr1 Nch body diode) | IS | 1.67 | A | Ta = 25℃ | 4 | ||
| Continuous forward current (Tr2 Pch body diode) | IS | -1.67 | A | Ta = 25℃ | 4 | ||
| Pulse forward current (Tr1 Nch body diode) | ISP | 18 | A | *1 Pw ≤ 10μs, Duty cycle ≤ 1% | 4 | ||
| Pulse forward current (Tr2 Pch body diode) | ISP | -18 | A | *1 Pw ≤ 10μs, Duty cycle ≤ 1% | 4 | ||
| Forward voltage (Tr1 Nch body diode) | VSD | 1.2 | V | *5 VGS = 0V, IS = 1.67A | 4 | ||
| Forward voltage (Tr2 Pch body diode) | VSD | -1.2 | V | *5 VGS = 0V, IS = -1.67A | 4 |
CAD (KiCad official)
- Symbol:
SH8ME5TB1 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
sh8me5tb1-etched.step/sh8me5tb1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sh8me5tb1.step/sh8me5tb1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ROHM Semicon datasheet (22 pp, sha256
fa4aace036473678, retrieved 2026-10-29, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).