LT3030EFE#PBF from Analog Devices, in a TSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	ADJ1	input	Channel 1 error amplifier input, regulated to 1.220V referenced to ground with an output range of 1.220V to 19.5V and an internal clamp of ±9V.
2	BYP1	passive	Channel 1 reference bypass pin, clamped to ±0.6V from ground; a capacitor of at most 10nF to OUT1 lowers output noise to a typical 20μVRMS, and the pin must be left unconnected if unused.
3	OUT1	power_out	Channel 1 regulated output supplying up to 750mA, requiring a minimum 10μF output capacitor to prevent oscillation.
4	OUT1	power_out	Channel 1 regulated output (second pin), supplying up to 750mA and requiring a minimum 10μF output capacitor to prevent oscillation.
5	GND	power_in	Ground connection that must be tied directly to the exposed pad and the bottom of the output voltage setting divider.
6	GND	power_in	Ground connection that must be tied directly to the exposed pad and the bottom of the output voltage setting divider.
7	OUT2	power_out	Channel 2 regulated output supplying up to 250mA, requiring a minimum 3.3μF output capacitor to prevent oscillation.
8	OUT2	power_out	Channel 2 regulated output (second pin), supplying up to 250mA and requiring a minimum 3.3μF output capacitor to prevent oscillation.
9	BYP2	passive	Channel 2 reference bypass pin, clamped to ±0.6V from ground; a capacitor of at most 10nF to OUT2 lowers output noise to a typical 20μVRMS, and the pin must be left unconnected if unused.
10	ADJ2	input	Channel 2 error amplifier input, regulated to 1.220V referenced to ground with an output range of 1.220V to 19.5V and an internal clamp of ±9V.
11	SHDN2	input	Channel 2 shutdown input; pulling it low turns the channel 2 output off, and it must be connected to IN2 if unused.
12	PWRGD2	output	Channel 2 open-collector power good flag that pulls low until the output exceeds 90% of nominal, requires an external pull-up, and sinks at most 100μA in the low state.
13	IN2	power_in	Channel 2 input supply, operating over a 1.7V to 20V input range, with a bypass capacitor of 1μF to 10μF recommended if far from the main input filter.
14	IN2	power_in	Channel 2 input supply (second pin), operating over a 1.7V to 20V input range, with a bypass capacitor of 1μF to 10μF recommended if far from the main input filter.
15	GND	power_in	Ground connection that must be tied directly to the exposed pad and the bottom of the output voltage setting divider.
16	GND	power_in	Ground connection that must be tied directly to the exposed pad and the bottom of the output voltage setting divider.
17	IN1	power_in	Channel 1 input supply, operating over a 1.7V to 20V input range, with a bypass capacitor of 1μF to 10μF recommended if far from the main input filter.
18	IN1	power_in	Channel 1 input supply (second pin), operating over a 1.7V to 20V input range, with a bypass capacitor of 1μF to 10μF recommended if far from the main input filter.
19	PWRGD1	output	Channel 1 open-collector power good flag that pulls low until the output exceeds 90% of nominal, requires an external pull-up, and sinks at most 100μA in the low state.
20	SHDN1	input	Channel 1 shutdown input; pulling it low turns the channel 1 output off, and it must be connected to IN1 if unused.
21	GND	power_in	Exposed pad, electrically GND, that must be soldered to the PCB ground for proper electrical and thermal performance.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	TSSOP-20-EP
Category	Power Management ICs
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
IN1, IN2 Pin Voltage	VIN	-22		22	V		2
OUT1, OUT2 Pin Voltage	VOUT	-22		22	V		2
Input-to-Output Differential Voltage		-22		22	V		2
ADJ1, ADJ2 Pin Voltage	VADJ	-9		9	V		2
BYP1, BYP2 Pin Voltage	VBYP	-0.6		0.6	V		2
SHDN1, SHDN2 Pin Voltage	VSHDN	-22		22	V		2
PWRGD1, PWRGD2 Pin Voltage	VPWRGD	-0.3		22	V		2
Operating Junction Temperature	TJ	-40		125	°C	E-/I-Grade	2
Storage Temperature Range	TSTG	-65		150	°C	QFN/TSSOP Package	2
Input Voltage Range	VIN	1.7		20	V		1
Output Voltage Range (Adjustable)	VOUT	1.22		19.5	V	Adjustable operation, ADJ pin voltage 1.220V referenced to ground	12
Minimum Input Voltage		1.7	2.2		V	Output 1, ILOAD = 750mA	3
ADJ1, ADJ2 Pin Voltage	VADJ	1.208	1.22	1.232	V	VIN = 2V, ILOAD = 1mA	3
ADJ1, ADJ2 Pin Voltage	VADJ	1.196	1.22	1.244	V	Output 1, 2.2V < VIN1 < 20V, 1mA < ILOAD < 750mA	3
Line Regulation			0.5	5	mV	ΔVIN = 2V to 20V, ILOAD = 1mA	3
Load Regulation			2	6	mV	Output 1, VIN1 = 2.2V, ΔILOAD = 1mA to 750mA	3
Load Regulation				10	mV	VIN1 = 2.2V, ΔILOAD = 1mA to 750mA	3
Dropout Voltage	VDROPOUT		0.13	0.2	V	Output 1, VIN1 = VOUT1(NOMINAL), ILOAD = 10mA	3
Dropout Voltage	VDROPOUT		0.17	0.23	V	Output 1, VIN1 = VOUT1(NOMINAL), ILOAD = 100mA	3
Dropout Voltage	VDROPOUT		0.27	0.32	V	Output 1, VIN1 = VOUT1(NOMINAL), ILOAD = 500mA	3
Dropout Voltage	VDROPOUT		0.3	0.36	V	Output 1, VIN1 = VOUT1(NOMINAL), ILOAD = 750mA	3
Dropout Voltage	VDROPOUT		0.14	0.2	V	Output 2, VIN2 = VOUT2(NOMINAL), ILOAD = 10mA	3
Dropout Voltage	VDROPOUT		0.18	0.24	V	Output 2, VIN2 = VOUT2(NOMINAL), ILOAD = 50mA	3
Dropout Voltage	VDROPOUT		0.22	0.28	V	Output 2, VIN2 = VOUT2(NOMINAL), ILOAD = 100mA	3
GND Pin Current (Output 1)	IGND		120	300	μA	VIN1 = VOUT1(NOMINAL), ILOAD = 0mA	3
GND Pin Current (Output 1)	IGND		420	800	μA	VIN1 = VOUT1(NOMINAL), ILOAD = 10mA	3
GND Pin Current (Output 1)	IGND		2	3.8	mA	VIN1 = VOUT1(NOMINAL), ILOAD = 100mA	3
GND Pin Current (Output 1)	IGND		9	17	mA	VIN1 = VOUT1(NOMINAL), ILOAD = 500mA	3
GND Pin Current (Output 1)	IGND		15	27	mA	VIN1 = VOUT1(NOMINAL), ILOAD = 750mA	3
GND Pin Current (Output 2)	IGND		75	200	μA	VIN2 = VOUT2(NOMINAL), ILOAD = 0mA	3
GND Pin Current (Output 2)	IGND		330	600	μA	VIN2 = VOUT2(NOMINAL), ILOAD = 10mA	3
GND Pin Current (Output 2)	IGND		1	1.8	mA	VIN2 = VOUT2(NOMINAL), ILOAD = 50mA	3
GND Pin Current (Output 2)	IGND		1.8	3.4	mA	VIN2 = VOUT2(NOMINAL), ILOAD = 100mA	3
GND Pin Current (Output 2)	IGND		5	9	mA	VIN2 = VOUT2(NOMINAL), ILOAD = 250mA	3
ADJ1/ADJ2 Pin Bias Current	IADJ		30	100	nA		3
Shutdown Threshold (Off to On)	VSHDN	1.09	1.21	1.33	V	VOUT = Off to On	3
Shutdown Threshold (On to Off)	VSHDN	0.5	0.83		V	VOUT = On to Off	3
SHDN1/SHDN2 Pin Current	ISHDN	0		0.5	μA	VSHDN1, VSHDN2 = 0V	3
SHDN1/SHDN2 Pin Current	ISHDN	0.85		3	μA	VSHDN1, VSHDN2 = 20V	3
Quiescent Current in Shutdown (per Channel)	IQ(SHDN)		0.3	2	μA	VIN = 20V, VSHDN1 = 0V, VSHDN2 = 0V	3
PWRGD Trip Point		86	90	94	%	% of Nominal Output Voltage, Output Rising	3
PWRGD Output Low Voltage	VOL		15	150	mV	IPWRGD = 100μA	3
PWRGD Leakage Current				1	μA	VSHDN = 0V, VPWRGD = 20V	3
Ripple Rejection		50	60		dB	VIN = 2.72V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = Full Current	4
Ripple Rejection		50			dB	VIN = VOUT(NOMINAL) + 1V, VRIPPLE = 50mVRMS, fRIPPLE = 1MHz, ILOAD = Full Current	4
Current Limit (Output 1)	ILIM	1.1	1.4	1.7	A	Output 1, VIN1 = 6V, VOUT1 = 0V	4
Current Limit (Output 1)	ILIM	800			mA	VIN1 = 2.2V, ΔVOUT1 = -0.1V	4
Current Limit (Output 2)	ILIM	350	420	490	mA	Output 2, VIN2 = 6V, VOUT2 = 0V	4
Current Limit (Output 2)	ILIM	270			mA	VIN2 = 2.2V, ΔVOUT2 = -0.1V	4
Input Reverse Leakage Current	IIN(REV)			1	mA	VIN = -20V, VOUT = 0V	4
Reverse Output Current	IOUT(REV)		0.5	10	μA	VOUT = 1.220V, VIN = 0V	4
Shutdown Threshold Hysteresis			0.38		V		3
Junction-to-Ambient Thermal Resistance (TSSOP)	θJA		28		°C/W	FE package, 20-Lead TSSOP, as printed in Absolute Maximum Ratings	2
Junction-to-Case Thermal Resistance (TSSOP)	θJC		10		°C/W	FE package, measured at exposed pad	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	COPPER		Table 2. UFD Package, 28-Lead QFN COPPER AREA	15

CAD (KiCad official)

Symbol: LT3030EFE#PBF
Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
3D model: TSSOP-20-EP (KiCad packages3D, STEP)
3D model files: lt3030efe-pbf-etched.step / lt3030efe-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3030efe-pbf.step / lt3030efe-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (22 pp, sha256 155d0aad0a2cb7e7, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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LT3030EFE#PBF

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