component
SI6543DQ-T1-GE3-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSI6543DQ-T1-GE3-VB
VBsemi Elec · MOSFETs · TSSOP-8
SI6543DQ-T1-GE3-VB from VBsemi Elec, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D1 | passive | Drain of the N-channel MOSFET (30V, 22mΩ typ at VGS=10V, 6.2A continuous). |
| 2 | S1 | passive | Source of the N-channel MOSFET (Q1). |
| 3 | S1 | passive | Source of the N-channel MOSFET (Q1), second source pin tied to pin 2. |
| 4 | G1 | input | Gate of the N-channel MOSFET, gate-source voltage limit ±20V. |
| 5 | G2 | input | Gate of the P-channel MOSFET, gate-source voltage limit ±20V. |
| 6 | S2 | passive | Source of the P-channel MOSFET (Q2). |
| 7 | S2 | passive | Source of the P-channel MOSFET (Q2), second source pin tied to pin 6. |
| 8 | D2 | passive | Drain of the P-channel MOSFET (-30V, 45mΩ typ at VGS=-10V, -5.0A continuous). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VBsemi Elec |
| Package | TSSOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage (N-channel) | VDS | 30 | V | 1 | |||
| Drain-Source Voltage (P-channel) | VDS | -30 | V | 1 | |||
| Gate-Source Voltage (N-channel) | VGS | 20 | V | 1 | |||
| Gate-Source Voltage (P-channel) | VGS | 20 | V | 1 | |||
| Continuous Drain Current (N-channel) | ID@TA=25℃ | 6.2 | A | 1 | |||
| Continuous Drain Current (P-channel) | ID@TA=25℃ | -5 | A | 1 | |||
| Continuous Drain Current (N-channel) | ID@TA=70℃ | 5 | A | 1 | |||
| Continuous Drain Current (P-channel) | ID@TA=70℃ | -4 | A | 1 | |||
| Pulsed Drain Current (N-channel) | IDM | 20 | A | 1 | |||
| Pulsed Drain Current (P-channel) | IDM | -18 | A | 1 | |||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 | ||
| Operating Junction Temperature Range | TJ | -55 | 150 | ℃ | 1 | ||
| Maximum Thermal Resistance, Junction-ambient | Rthj-a | 90 | ℃/W | Surface mounted on 1 in2 copper pad of FR4 board, t<10sec (note 3) | 1 | ||
| Gate Threshold Voltage (N-channel) | VGS(th) | 1 | 3 | V | VDS=VGS, ID=250uA | 2 | |
| Drain-Source Breakdown Voltage (N-channel) | BVDSS | 30 | V | VGS=0V, ID=250uA | 2 | ||
| Drain-Source Leakage Current (N-channel) | IDSS | 1 | uA | VDS=24V, VGS=0V | 2 | ||
| Gate-Source Leakage (N-channel) | IGSS | 100 | nA | VGS=+20V, VDS=0V | 2 | ||
| Total Gate Charge (N-channel) | Qg | 11 | nC | ID=6A | 2 | ||
| Forward On Voltage (N-channel) | VSD | 1.2 | V | IS=1.2A, VGS=0V | 2 | ||
| Drain-Source Breakdown Voltage (P-channel) | BVDSS | -30 | V | VGS=0V, ID=-250uA | 3 | ||
| Gate Threshold Voltage (P-channel) | VGS(th) | -1 | -3 | V | VDS=VGS, ID=-250uA | 3 | |
| Drain-Source Leakage Current (P-channel) | IDSS | -1 | uA | VDS=-24V, VGS=0V | 3 | ||
| Gate-Source Leakage (P-channel) | IGSS | 100 | nA | VGS=+20V, VDS=0V | 3 | ||
| Total Gate Charge (P-channel) | Qg | 23 | nC | 3 | |||
| Forward On Voltage (P-channel) | VSD | -1.2 | V | IS=-1.2A, VGS=0V | 3 |
CAD (KiCad official)
- Symbol:
SI6543DQ-T1-GE3-VB - Footprint:
Package_SO:TSSOP-8_4.4x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
si6543dq-t1-ge3-vb-etched.step/si6543dq-t1-ge3-vb-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);si6543dq-t1-ge3-vb.step/si6543dq-t1-ge3-vb.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VBsemi Elec datasheet (9 pp, sha256
b6d3d031fcf3d2c0, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).