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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32F051K6T7

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32F051K6T7 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Digital power supply (VDD = 2.0 V to 3.6 V)
2	PF0-OSC_IN	input	Port F bit 0, oscillator input pin for external crystal oscillator (4 to 32 MHz)
3	PF1-OSC_OUT	output	Port F bit 1, oscillator output pin for external crystal oscillator
4	NRST	bidirectional	Device reset input / internal reset output (active low) with embedded weak pull-up resistor
5	VDDA	power_in	Analog power supply for ADC, DAC, and comparators (from VDD to 3.6 V, minimum 2.4 V)
6	PA0	bidirectional	GPIO Port A bit 0, 3.3V tolerant I/O connectable to ADC_IN0, supporting USART2_CTS, TIM2_CH1_ETR, COMP1_OUT, TSC_G1_IO1, RTC_TAMP2, WKUP1
7	PA1	bidirectional	GPIO Port A bit 1, 3.3V tolerant I/O connectable to ADC_IN1, supporting USART2_RTS, TIM2_CH2, TSC_G1_IO2, EVENTOUT, COMP1_INP
8	PA2	bidirectional	GPIO Port A bit 2, 3.3V tolerant I/O connectable to ADC_IN2, supporting USART2_TX, TIM2_CH3, TIM15_CH1, COMP2_OUT, TSC_G1_IO3, COMP2_INM6
9	PA3	bidirectional	GPIO Port A bit 3, 3.3V tolerant I/O connectable to ADC_IN3, supporting USART2_RX, TIM2_CH4, TIM15_CH2, TSC_G1_IO4, COMP2_INP
10	PA4	bidirectional	GPIO Port A bit 4, 3.3V tolerant I/O connectable to ADC_IN4 and DAC_OUT1, supporting SPI1_NSS, I2S1_WS, USART2_CK, TIM14_CH1, TSC_G2_IO1, COMP1_INM4, COMP2_INM4
11	PA5	bidirectional	GPIO Port A bit 5, 3.3V tolerant I/O connectable to ADC_IN5, supporting SPI1_SCK, I2S1_CK, CEC, TIM2_CH1_ETR, TSC_G2_IO2, COMP1_INM5, COMP2_INM5
12	PA6	bidirectional	GPIO Port A bit 6, 3.3V tolerant I/O connectable to ADC_IN6, supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, COMP1_OUT, TSC_G2_IO3, EVENTOUT
13	PA7	bidirectional	GPIO Port A bit 7, 3.3V tolerant I/O connectable to ADC_IN7, supporting SPI1_MOSI, I2S1_SD, TIM3_CH2, TIM14_CH1, TIM1_CH1N, TIM17_CH1, COMP2_OUT, TSC_G2_IO4, EVENTOUT
14	PB0	bidirectional	GPIO Port B bit 0, 3.3V tolerant I/O connectable to ADC_IN8, supporting TIM3_CH3, TIM1_CH2N, TSC_G3_IO2, EVENTOUT
15	PB1	bidirectional	GPIO Port B bit 1, 3.3V tolerant I/O connectable to ADC_IN9, supporting TIM3_CH4, TIM14_CH1, TIM1_CH3N, TSC_G3_IO3
16	VSS	power_in	Digital ground (0 V)
17	VDD	power_in	Digital power supply (VDD = 2.0 V to 3.6 V)
18	PA8	bidirectional	GPIO Port A bit 8, 5V tolerant I/O supporting USART1_CK, TIM1_CH1, EVENTOUT, MCO (master clock output)
19	PA9	bidirectional	GPIO Port A bit 9, 5V tolerant I/O supporting USART1_TX, TIM1_CH2, TIM15_BKIN, TSC_G4_IO1
20	PA10	bidirectional	GPIO Port A bit 10, 5V tolerant I/O supporting USART1_RX, TIM1_CH3, TIM17_BKIN, TSC_G4_IO2
21	PA11	bidirectional	GPIO Port A bit 11, 5V tolerant I/O supporting USART1_CTS, TIM1_CH4, COMP1_OUT, TSC_G4_IO3, EVENTOUT
22	PA12	bidirectional	GPIO Port A bit 12, 5V tolerant I/O supporting USART1_RTS, TIM1_ETR, COMP2_OUT, TSC_G4_IO4, EVENTOUT
23	PA13 (SWDIO)	bidirectional	GPIO Port A bit 13, 5V tolerant I/O for Serial Wire Debug I/O with internal pull-up; after reset configured as SWDIO with internal pull-up activated, supporting IR_OUT
24	PA14 (SWCLK)	bidirectional	GPIO Port A bit 14, 5V tolerant I/O for Serial Wire Debug Clock with internal pull-down; after reset configured as SWCLK with internal pull-down activated, supporting USART2_TX
25	PA15	bidirectional	GPIO Port A bit 15, 5V tolerant I/O supporting SPI1_NSS, I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT
26	PB3	bidirectional	GPIO Port B bit 3, 5V tolerant I/O supporting SPI1_SCK, I2S1_CK, TIM2_CH2, TSC_G5_IO1, EVENTOUT
27	PB4	bidirectional	GPIO Port B bit 4, 5V tolerant I/O supporting SPI1_MISO, I2S1_MCK, TIM3_CH1, TSC_G5_IO2, EVENTOUT
28	PB5	bidirectional	GPIO Port B bit 5, 5V tolerant I/O supporting SPI1_MOSI, I2S1_SD, I2C1_SMBA, TIM16_BKIN, TIM3_CH2
29	PB6	bidirectional	GPIO Port B bit 6, 5V tolerant FM+ I/O for I2C1_SCL supporting USART1_TX, TIM16_CH1N, TSC_G5_IO3 with 20 mA sink current capability
30	PB7	bidirectional	GPIO Port B bit 7, 5V tolerant FM+ I/O for I2C1_SDA supporting USART1_RX, TIM17_CH1N, TSC_G5_IO4 with 20 mA sink current capability
31	BOOT0	input	Dedicated boot memory selection input pin determining whether code executes from Flash memory or system memory at startup
32	VSS	power_in	Digital ground (0 V)

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-32(7x7)
Category	Embedded Processors & Controllers
Pins	32

CAD (KiCad official)

Symbol: STM32F051K6T7
Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
3D model files: stm32f051k6t7-etched.step / stm32f051k6t7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f051k6t7.step / stm32f051k6t7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (122 pp, sha256 80848a22804e56d8, retrieved 2026-10-01, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF