STC15W4K56S4-30I-LQFP64S
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STC Micro Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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README
markdownSTC15W4K56S4-30I-LQFP64S
STC Micro · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STC15W4K56S4-30I-LQFP64S from STC Micro, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P5.3/TxD4_2 | bidirectional | Port 5 bit 3, standard I/O. Alternate: UART4 transmit (TxD4) secondary mapping. |
| 2 | P0.5/AD5/T3/PWMFLT_2 | bidirectional | Port 0 bit 5, standard I/O. Address/data bus AD5 in external memory mode; Timer3 external clock input (T3); PWM fault input alt-mapping. |
| 3 | P0.6/AD6/T4CLKO/PWM7_2 | bidirectional | Port 0 bit 6, standard I/O. Address/data bus AD6; Timer4 clock output (T4CLKO); PWM channel 7 alt-mapping. |
| 4 | P0.7/AD7/T4/PWM2_2 | bidirectional | Port 0 bit 7, standard I/O. Address/data bus AD7; Timer4 external input (T4); PWM channel 2 alt-mapping. |
| 5 | P6.0 | bidirectional | Port 6 bit 0, standard bidirectional I/O. |
| 6 | P6.1 | bidirectional | Port 6 bit 1, standard bidirectional I/O. |
| 7 | P6.2 | bidirectional | Port 6 bit 2, standard bidirectional I/O. |
| 8 | P6.3 | bidirectional | Port 6 bit 3, standard bidirectional I/O. |
| 9 | P1.0/ADC0/CCP1/RxD2 | bidirectional | Port 1 bit 0. ADC channel 0; PCA/CCP capture/compare channel 1 (CCP1); UART2 receive (RxD2). |
| 10 | P1.1/ADC1/CCP0/TxD2 | bidirectional | Port 1 bit 1. ADC channel 1; PCA/CCP channel 0 (CCP0); UART2 transmit (TxD2). |
| 11 | P4.7/TxD2_2 | bidirectional | Port 4 bit 7, standard I/O. UART2 transmit alt-mapping (TxD2_2). |
| 12 | P1.2/ADC2/SS/ECI/CMPO | bidirectional | Port 1 bit 2. ADC channel 2; SPI slave-select (SS); PCA external clock input (ECI); on-chip comparator output (CMPO). |
| 13 | P1.3/ADC3/MOSI | bidirectional | Port 1 bit 3. ADC channel 3; SPI master-out-slave-in (MOSI). |
| 14 | P1.4/ADC4/MISO | bidirectional | Port 1 bit 4. ADC channel 4; SPI master-in-slave-out (MISO). |
| 15 | P1.5/ADC5/SCLK | bidirectional | Port 1 bit 5. ADC channel 5; SPI serial clock (SCLK). |
| 16 | P1.6/ADC6/RxD_3/XTAL2/MCLKO_2/PWM6 | bidirectional | Port 1 bit 6. ADC channel 6; UART1 receive alt-mapping (RxD_3); external crystal output XTAL2; master-clock output alt (MCLKO_2); PWM channel 6. |
| 17 | P1.7/ADC7/TxD_3/XTAL1/PWM7 | bidirectional | Port 1 bit 7. ADC channel 7; UART1 transmit alt-mapping (TxD_3); external crystal input XTAL1; PWM channel 7. |
| 18 | P5.4/RST/MCLKO/SS_3/CMP- | bidirectional | Port 5 bit 4 / external RESET input (RST) / master-clock output (MCLKO) / SPI slave-select alt (SS_3) / comparator negative input (CMP-). Default function is RST; selectable as GPIO via ISP flag. |
| 19 | VCC | power_in | Positive supply (Vcc). Operating range 2.5V-5.5V (5V grade). Decouple with 100nF close to the pin. |
| 20 | P5.5/CMP+ | bidirectional | Port 5 bit 5, standard I/O. Comparator positive input (CMP+). |
| 21 | GND | power_in | Ground (0V) reference for supply and I/O. |
| 22 | P4.0/MOSI_3 | bidirectional | Port 4 bit 0, standard I/O. SPI master-out-slave-in alt-mapping (MOSI_3). |
| 23 | P6.4 | bidirectional | Port 6 bit 4, standard bidirectional I/O. |
| 24 | P6.5 | bidirectional | Port 6 bit 5, standard bidirectional I/O. |
| 25 | P6.6 | bidirectional | Port 6 bit 6, standard bidirectional I/O. |
| 26 | P6.7 | bidirectional | Port 6 bit 7, standard bidirectional I/O. |
| 27 | P3.0/RxD/INT4/T2CLKO | bidirectional | Port 3 bit 0. UART1 receive (RxD); external interrupt 4 (INT4, falling-edge only); Timer2 clock output (T2CLKO). Used by the STC ISP loader for programming. |
| 28 | P3.1/TxD/T2 | bidirectional | Port 3 bit 1. UART1 transmit (TxD); Timer2 external input (T2). Used by the STC ISP loader. |
| 29 | P3.2/INT0 | bidirectional | Port 3 bit 2 / external interrupt 0 (INT0), rising- and falling-edge sensitive. Can wake MCU from power-down. |
| 30 | P3.3/INT1 | bidirectional | Port 3 bit 3 / external interrupt 1 (INT1), rising- and falling-edge sensitive. Can wake MCU from power-down. |
| 31 | P3.4/T0/T1CLKO/ECI_2 | bidirectional | Port 3 bit 4. Timer0 external input (T0); Timer1 clock output (T1CLKO); PCA external clock alt-mapping (ECI_2). |
| 32 | P5.0/RxD3_2 | bidirectional | Port 5 bit 0. UART3 receive alt-mapping (RxD3_2). |
| 33 | P5.1/TxD3_2 | bidirectional | Port 5 bit 1. UART3 transmit alt-mapping (TxD3_2). |
| 34 | P3.5/T1/T0CLKO/CCP0_2 | bidirectional | Port 3 bit 5. Timer1 external input (T1); Timer0 clock output (T0CLKO); PCA/CCP channel 0 alt-mapping (CCP0_2). |
| 35 | P3.6/INT2/RxD_2/CCP1_2 | bidirectional | Port 3 bit 6 / external interrupt 2 (INT2, falling-edge only); UART1 receive alt (RxD_2); PCA/CCP channel 1 alt (CCP1_2). |
| 36 | P3.7/INT3/TxD_2/PWM2 | bidirectional | Port 3 bit 7 / external interrupt 3 (INT3, falling-edge only); UART1 transmit alt (TxD_2); PWM channel 2. |
| 37 | P7.0 | bidirectional | Port 7 bit 0, standard bidirectional I/O. |
| 38 | P7.1 | bidirectional | Port 7 bit 1, standard bidirectional I/O. |
| 39 | P7.2 | bidirectional | Port 7 bit 2, standard bidirectional I/O. |
| 40 | P7.3 | bidirectional | Port 7 bit 3, standard bidirectional I/O. |
| 41 | P4.1/MISO_3 | bidirectional | Port 4 bit 1. SPI master-in-slave-out alt-mapping (MISO_3). |
| 42 | P4.2/WR/PWM5_2 | bidirectional | Port 4 bit 2. External memory write strobe (/WR); PWM channel 5 alt-mapping. |
| 43 | P4.3/SCLK_3 | bidirectional | Port 4 bit 3. SPI clock alt-mapping (SCLK_3). |
| 44 | P4.4/RD/PWM4_2 | bidirectional | Port 4 bit 4. External memory read strobe (/RD); PWM channel 4 alt-mapping. |
| 45 | P2.0/A8/RSTOUT_LOW | bidirectional | Port 2 bit 0. External memory address bus A8; MCU reset-output-low pin (drives low during reset, tri-state after) for peripheral reset. |
| 46 | P2.1/A9/SCLK_2/PWM3 | bidirectional | Port 2 bit 1. Address bus A9; SPI clock alt (SCLK_2); PWM channel 3. |
| 47 | P2.2/A10/MISO_2/PWM4 | bidirectional | Port 2 bit 2. Address bus A10; SPI MISO alt (MISO_2); PWM channel 4. |
| 48 | P2.3/A11/MOSI_2/PWM5 | bidirectional | Port 2 bit 3. Address bus A11; SPI MOSI alt (MOSI_2); PWM channel 5. |
| 49 | P2.4/A12/ECI_3/SS_2/PWMFLT | bidirectional | Port 2 bit 4. Address bus A12; PCA external clock alt (ECI_3); SPI slave-select alt (SS_2); PWM fault-input (PWMFLT, stops PWM when asserted). |
| 50 | P2.5/A13/CCP0_3 | bidirectional | Port 2 bit 5. Address bus A13; PCA/CCP channel 0 alt-mapping (CCP0_3). |
| 51 | P2.6/A14/CCP1_3 | bidirectional | Port 2 bit 6. Address bus A14; PCA/CCP channel 1 alt-mapping (CCP1_3). |
| 52 | P2.7/A15/PWM2_2 | bidirectional | Port 2 bit 7. Address bus A15; PWM channel 2 alt-mapping (PWM2_2). |
| 53 | P7.4 | bidirectional | Port 7 bit 4, standard bidirectional I/O. |
| 54 | P7.5 | bidirectional | Port 7 bit 5, standard bidirectional I/O. |
| 55 | P7.6 | bidirectional | Port 7 bit 6, standard bidirectional I/O. |
| 56 | P7.7 | bidirectional | Port 7 bit 7, standard bidirectional I/O. |
| 57 | P4.5/ALE/PWM3_2 | bidirectional | Port 4 bit 5. External memory address-latch-enable (ALE) strobe; PWM channel 3 alt-mapping (PWM3_2). |
| 58 | P4.6/RxD2_2 | bidirectional | Port 4 bit 6. UART2 receive alt-mapping (RxD2_2). |
| 59 | P0.0/AD0/RxD3 | bidirectional | Port 0 bit 0. External memory address/data bus AD0; UART3 receive (RxD3). |
| 60 | P0.1/AD1/TxD3 | bidirectional | Port 0 bit 1. Address/data bus AD1; UART3 transmit (TxD3). |
| 61 | P0.2/AD2/RxD4 | bidirectional | Port 0 bit 2. Address/data bus AD2; UART4 receive (RxD4). |
| 62 | P0.3/AD3/TxD4 | bidirectional | Port 0 bit 3. Address/data bus AD3; UART4 transmit (TxD4). |
| 63 | P0.4/AD4/T3CLKO | bidirectional | Port 0 bit 4. Address/data bus AD4; Timer3 clock output (T3CLKO). |
| 64 | P5.2/RxD4_2 | bidirectional | Port 5 bit 2. UART4 receive alt-mapping (RxD4_2). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | LQFP-64(10x10) |
| Category | MCU |
| Pins | 64 |
Ordering variants
Same part, different packaging or reel option.
STC15W4K56S4-30I-LQFP64SSTC15W4K56S4-30I-LQFP64LSTC15W4K56S4-30I-LQFP64SQFN64STC15W4K56S4-30I-LQFP48STC15W4K56S4-30I-LQFP44STC15W4K56S4-30I-LQFP64SPDIP40STC15W4K56S4-30I-LQFP64SSOP32STC15W4K56S4-30I-LQFP32STC15W4K56S4-30I-LQFP64SSOP28STC15W4K56S4-30I-LQFP64SSKDIP28
CAD (KiCad official)
- Symbol:
STC15W4K56S4-30I-LQFP64S - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
stc15w4k56s4-30i-lqfp64s.step |
847 KB | You want the bare part, or you mark your own boards. |
stc15w4k56s4-30i-lqfp64s-etched.step |
7.2 MB | You want the part with STC15W4K56S4-30I-LQFP64S already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1766 faces against 995 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (1116 pp, sha256
5fbdfd823a6ce7e0, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).