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Contents

README

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CAT4016HV6-GT2

onsemi · LED Drivers · TQFN-24-EP(4x4)

CAT4016HV6-GT2 from onsemi, in a TQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin that must be connected to the ground plane on the PCB.
2 SIN input Serial data input; data is loaded into the internal register on each rising edge of CLK.
3 CLK input Serial clock input; on each rising edge data moves from SIN into the 16-bit shift register (up to 25 MHz).
4 LATCH input Latch input; the rising edge loads the 16-bit shift register into the output latch, the falling edge latches it, with an internal 180 kΩ typical pull-down.
5 LED1 passive LED channel 1 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
6 LED2 passive LED channel 2 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
7 LED3 passive LED channel 3 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
8 LED4 passive LED channel 4 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
9 LED5 passive LED channel 5 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
10 LED6 passive LED channel 6 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
11 LED7 passive LED channel 7 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
12 LED8 passive LED channel 8 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
13 LED9 passive LED channel 9 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
14 LED10 passive LED channel 10 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
15 LED11 passive LED channel 11 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
16 LED12 passive LED channel 12 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
17 LED13 passive LED channel 13 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
18 LED14 passive LED channel 14 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
19 LED15 passive LED channel 15 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
20 LED16 passive LED channel 16 cathode current sink; the LED pin voltage must be above 0.4 V for correct operation.
21 BLANK input Enable/disable input for all channels; low enables LEDs per the latch, high turns all LEDs off, with an internal 180 kΩ typical pull-up.
22 SOUT output Serial data output of the 16-bit shift register, connected to SIN of the next device to cascade.
23 RSET passive LED current set pin; a resistor to ground sets each channel current to 50 times the RSET pin current, with the pin regulated to 1.2 V.
24 VDD power_in Positive supply pin for the entire device, 3.0 V to 5.5 V recommended, with a 1 µF ceramic capacitor close to the pin.
25 EP power_in Exposed pad (TAB, TQFN only); connect to GND on the PCB.

Key specifications

Parameter Value
Manufacturer onsemi
Package TQFN-24-EP(4x4)
Category Display Modules / LED Drivers / Display Drivers
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
LED Current (any channel) ILED-ACC 18 20 22 mA VLED = 1 V, RSET = 3 k 3
LED Current (any channel) ILED-ACC 36 40 44 mA VLED = 1 V, RSET = 1.5 k 3
LED Current (any channel) ILED-ACC 80 mA VLED = 1 V, RSET = 750 3
LED Current Matching ILED-MAT -6 1.5 6 % VLED = 1 V, RSET = 1.5 k 3
LED Current Matching ILED-MAT 1.5 % VLED = 1 V, RSET = 3 k 3
LED Current Matching ILED-MAT 2 % VLED = 1 V, RSET = 750 3
Supply Current (all outputs off) IDDOFF 3 8 mA RSET = 3 k 3
Supply Current (all outputs off) IDDOFF 8.5 mA RSET = 750 3
Supply Current (all outputs on) IDDON 4 9 mA RSET = 3 k 3
Supply Current (all outputs on) IDDON 10 mA RSET = 750 3
LEDn output Leakage ILKG -1 1 µA VLED = 5 V, outputs off 3
LATCH Pull-down Resistance RLATCH 100 180 300 kΩ 3
BLANK Pull-up Resistance RBLANK 100 180 300 kΩ 3
Logic high input voltage VIH 0.7 xVDD 3
Logic low input voltage VIL 0.3 xVDD 3
Logic Input leakage current (CLK, SIN) IIL -5 0 5 µA VI = VDD or GND 3
SOUT logic low output voltage VOL 0.3 V IOL = 1 mA 3
RSET Regulated Voltage VRSET 1.17 1.2 1.23 V 3
LED current regulation vs. VDD ΔIVDD 0.1 % / V VDD within 4.5 V and 5.5 V, LED current 30 mA (printed ±0.1) 3
LED current regulation vs. VLED ΔIVLED 0.05 % / V VLED within 1 V and 3 V, LED current 30 mA (printed ±0.05) 3
Logic input hysteresis voltage VHYS 0.1 xVDD 3
Thermal Shutdown TSD 160 °C 3
Thermal Hysteresis THYST 20 °C 3
CLK Clock Frequency fclk 25 MHz 3.0 V ≤ VDD ≤ 5.5 V 4
CLK Pulse Width High tcwh 20 ns 4
CLK Pulse Width Low tcwl 20 ns 4
Setup time SIN to CLK tssu 4 ns 4
Hold time SIN to CLK tsh 4 ns 4
LATCH Pulse width tlwh 20 ns 4
Hold time LATCH to CLK Tlh 4 ns 4
LED Propagation delay stagger LED(n) to LED(n+1) tls 17 40 ns 4
LED Propagation delay stagger total LED1 to LED16 tlst 250 ns 4
SOUT rise time (10% to 90%) tor 5 ns CL = 15 pF 4
SOUT fall time (90% to 10%) tof 5 ns CL = 15 pF 4
Propagation delay time SOUT tod 8 15 25 ns CLK to SOUT 4
VDD Supply Voltage VDD 6 V 2
LEDn voltage, channel off 6 V channel off 2
LEDn voltage, channel on 2.5 V channel on 2
DC output current on LED1 to LED16 150 mA 2
Storage Temperature Range -55 160 °C 2
Junction Temperature Range -40 150 °C 2
Lead Soldering Temperature 300 °C 10 sec. 2
VDD VDD 3 5.5 V 2
Voltage applied to LED1 to LED16, channel off 0.4 5.5 V channel off 2
Voltage applied to LED1 to LED16, channel on 0.4 2 V channel on 2
LED current RSET control range 100 mA up to 100 mA 2
Ambient Temperature Range CAT4016 -40 85 °C CAT4016 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 3 = Lead Finish − Matte−Tin B = Product Revision (Fixed as “B”) 1

CAD (KiCad official)

  • Symbol: CAT4016HV6-GT2
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: TQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: cat4016hv6-gt2-etched.step / cat4016hv6-gt2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cat4016hv6-gt2.step / cat4016hv6-gt2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (14 pp, sha256 fbac634207beaf1d, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF