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LT8302IS8E#WTRPBF
Public Made by Adomby adom
Analog Devices DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLT8302IS8E#WTRPBF
Analog Devices · DC-DC Converters · SOIC-8-EP
LT8302IS8E#WTRPBF from Analog Devices, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN/UVLO | input | Enable and undervoltage lockout input: pulling it below 0.3V shuts the device down, its accurate 1.214V threshold can program a VIN UVLO via a resistor divider with a 2.5µA hysteresis current, and it must be tied directly to VIN if unused. |
| 2 | INTVCC | power_out | Internal 3V linear regulator output that powers the control circuitry and gate driver, must not be overdriven by an external supply, and needs a minimum 1µF ceramic bypass to GND. |
| 3 | VIN | power_in | Input supply pin for 3V to 42V operation that powers the internal circuitry and serves as the reference for the RFB feedback circuit, and it should be locally bypassed to GND. |
| 4 | GND | power_in | Ground pin, which should be connected to the ground plane together with the exposed pad. |
| 5 | SW | output | Drain of the internal 65V, 3.6A DMOS power switch, rated to 65V for transients, so the flyback spike must be derated below 65V and the trace area kept small to reduce EMI and voltage spikes. |
| 6 | RFB | input | Input for the external feedback resistor connected to the transformer primary, with the RFB-to-RREF ratio setting the output voltage, a maximum input current of 200µA, and a voltage limit of VIN − 0.5V to VIN. |
| 7 | RREF | input | Ground-referred reference resistor pin, where the resistor should nominally be 10kΩ and may range from 9.09kΩ to 11.0kΩ for divider ratio selection. |
| 8 | TC | output | Outputs a PTAT voltage of 3.35mV/K (1V at 25°C) that can estimate junction temperature, and a resistor from this pin to RREF compensates the output diode temperature coefficient. |
| 9 | GND | power_in | The exposed pad is GND and must be soldered directly to the PCB ground plane for both electrical and thermal contact. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN Voltage Range | VIN | 3 | 42 | V | Over full operating temperature range (l) | 3 | |
| VIN Quiescent Current, Shutdown | IQ | 0.5 | 2 | µA | VEN/UVLO = 0.2V | 3 | |
| VIN Quiescent Current, Sleep Mode (Switch Off) | IQ | 53 | 106 | µA | VEN/UVLO = 1.1V | 3 | |
| VIN Quiescent Current, Active Mode (Switch On) | IQ | 380 | µA | VEN/UVLO = 1.1V | 3 | ||
| EN/UVLO Shutdown Threshold For Lowest Off IQ | 0.2 | 0.75 | V | Lowest off IQ; over full operating temperature range (l) | 3 | ||
| EN/UVLO Enable Threshold Falling (E, I, H, MP Grades) | 1.178 | 1.214 | 1.25 | V | Falling (E, I, H, MP Grades); over full operating temperature range (l) | 3 | |
| EN/UVLO Hysteresis Current | IHYS | -0.1 | 0 | 0.1 | µA | VEN/UVLO = 0.3V | 3 |
| EN/UVLO Hysteresis Current | IHYS | 2.3 | 2.5 | 2.7 | µA | VEN/UVLO = 1.1V | 3 |
| INTVCC Regulation Voltage | VINTVCC | 2.85 | 3 | 3.1 | V | IINTVCC = 0mA to 10mA | 3 |
| INTVCC Current Limit | IINTVCC | 10 | 13 | 20 | mA | VINTVCC = 2.8V | 3 |
| INTVCC UVLO Threshold Falling | 2.39 | 2.47 | 2.55 | V | Falling | 3 | |
| (RFB, VIN) Voltage | -50 | 50 | mV | IRFB = 75µA to 125µA | 3 | ||
| RREF Regulation Voltage | 0.98 | 1 | 1.02 | V | Over full operating temperature range (l) | 3 | |
| RREF Regulation Voltage Line Regulation | -0.01 | 0 | 0.01 | %/V | 3V ≤ VIN ≤ 42V | 3 | |
| TC Pin Current (LT8302) | ITC | 12 | 15 | 18 | µA | VTC = 1.2V (LT8302) | 3 |
| Minimum Switching Frequency | fMIN | 11.3 | 12 | 12.7 | kHz | 3 | |
| Maximum Switch-Off Time Backup Timer | tOFF(MAX) | 170 | µs | Backup timer | 3 | ||
| Maximum Switch Current Limit | ISW(MAX) | 3.6 | 4.5 | 5.4 | A | 3 | |
| Minimum Switch Current Limit | ISW(MIN) | 0.7 | 0.87 | 1.04 | A | 3 | |
| Switch Leakage Current | ILKG | 0.1 | 0.5 | µA | VSW = 65V | 3 | |
| SW Pin Voltage (transient rating) | 65 | V | SW pin; rated to 65V for transients | 2 | |||
| VIN Pin Voltage | 42 | V | VIN | 2 | |||
| INTVCC, RREF, TC Pin Voltage | 4 | V | INTVCC, RREF, TC | 2 | |||
| Current Into RFB | 200 | µA | Current into RFB | 2 | |||
| Operating Junction Temperature Range (LT8302I) | TJ | -40 | 125 | °C | LT8302I, LT8302I-3 | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Junction-to-Ambient Thermal Resistance | θJA | 33 | °C/W | S8E package, 8-lead plastic SO; exposed pad (pin 9) must be soldered to PCB | 2 |
CAD (KiCad official)
- Symbol:
LT8302IS8E#WTRPBF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lt8302is8e-wtrpbf-etched.step/lt8302is8e-wtrpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt8302is8e-wtrpbf.step/lt8302is8e-wtrpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
08515683bcc0fb0a, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).