AD8652ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	OUT A	output	Output of amplifier A, which can swing to within 5 mV of the positive and negative rails at 40 mA of output current.
2	-IN A	input	Inverting input of amplifier A, whose input common-mode range extends to both supply rails.
3	+IN A	input	Non-inverting input of amplifier A, whose input common-mode range extends to both supply rails.
4	V-	power_in	Negative supply rail, used at 0 V in the datasheet test conditions, with the part operating from a 2.7 V to 5.5 V single supply.
5	+IN B	input	Non-inverting input of amplifier B, whose input common-mode range extends to both supply rails.
6	-IN B	input	Inverting input of amplifier B, whose input common-mode range extends to both supply rails.
7	OUT B	output	Output of amplifier B, which can swing to within 5 mV of the positive and negative rails at 40 mA of output current.
8	V+	power_in	Positive supply rail, operating from 2.7 V to 5.5 V with a 6.0 V absolute maximum supply voltage.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Offset Voltage	VOS		90	300	μV	0 V ≤ VCM ≤ 2.7 V	3
Offset Voltage	VOS		0.4	1.3	mV	-40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 2.7 V	3
Input Bias Current	IB		1	10	pA		3
Input Bias Current	IB			600	pA	-40°C ≤ TA ≤ +125°C	3
Input Offset Current	IOS		1	10	pA		3
Input Offset Current	IOS			30	pA	-40°C ≤ TA ≤ +85°C	3
Input Offset Current	IOS			600	pA	-40°C ≤ TA ≤ +125°C	3
Input Voltage Range	VCM	-0.1		2.8	V		3
Common-Mode Rejection Ratio	CMRR	77	95		dB	V+ = 2.7 V, -0.1 V < VCM < +2.8 V	3
Common-Mode Rejection Ratio	CMRR	73	90		dB	-40°C ≤ TA ≤ +125°C, -0.1 V < VCM < +2.8 V	3
Large Signal Voltage Gain	AVO	100	115		dB	RL = 1 kΩ, 200 mV < VO < 2.5 V	3
Large Signal Voltage Gain	AVO	100	114		dB	RL = 1 kΩ, 200 mV < VO < 2.5 V, TA = 85°C	3
Large Signal Voltage Gain	AVO	95	108		dB	RL = 1 kΩ, 200 mV < VO < 2.5 V, TA = 125°C	3
Output Voltage High	VOH	2.67			V	IL = 250 μA, -40°C ≤ TA ≤ +125°C	3
Output Voltage Low	VOL			30	mV	IL = 250 μA, -40°C ≤ TA ≤ +125°C	3
Short-Circuit Limit Sourcing	ISC			80	mA	Sourcing	3
Short-Circuit Limit Sinking	ISC			80	mA	Sinking	3
Output Current	IO			40	mA		3
Power Supply Rejection Ratio	PSRR	76	94		dB	VS = 2.7 V to 5.5 V, VCM = 0 V	3
Power Supply Rejection Ratio	PSRR	74	93		dB	-40°C ≤ TA ≤ +125°C	3
Supply Current	ISY		17.5	19.5	mA	IO = 0, AD8652 at V+ = 2.7 V	3
Supply Current	ISY			22.5	mA	-40°C ≤ TA ≤ +125°C	3
Offset Voltage	VOS		90	300	μV	0 V ≤ VCM ≤ 5 V	4
Offset Voltage	VOS		0.4	1.4	mV	-40°C ≤ TA ≤ +125°C, 0 V ≤ VCM ≤ 5 V	4
Input Bias Current	IB			30	pA	-40°C ≤ TA ≤ +85°C	4
Input Voltage Range	VCM	-0.1		5.1	V		4
Common-Mode Rejection Ratio	CMRR	84	100		dB	0.1 V < VCM < 5.1 V	4
Common-Mode Rejection Ratio	CMRR	76	95		dB	-40°C ≤ TA ≤ +125°C, 0.1 V < VCM < 5.1 V	4
Large Signal Voltage Gain	AVO	100	115		dB	RL = 1 kΩ, 200 mV < VO < 4.8 V	4
Large Signal Voltage Gain	AVO	98	114		dB	RL = 1 kΩ, 200 mV < VO < 4.8 V, TA = 85°C	4
Large Signal Voltage Gain	AVO	95	111		dB	RL = 1 kΩ, 200 mV < VO < 4.8 V, TA = 125°C	4
Output Voltage High	VOH	4.97			V	IL = 250 µA, -40°C ≤ TA ≤ +125°C	4
Output Voltage Low	VOL			30	mV	IL = 250 µA, -40°C ≤ TA ≤ +125°C	4
Supply Current	ISY		17.5	20	mA	IO = 0, AD8652 at V+ = 5 V	4
Supply Current	ISY			23.5	mA	-40°C ≤ TA ≤ +125°C	4
Supply Voltage				6	V		5
Differential Input Voltage		-6		6	V		5
Electrostatic Discharge (HBM)				4000	V		5
Storage Temperature Range		-65		150	°C	RM, R Package	5
Operating Temperature Range		-40		125	°C		5
Junction Temperature Range		-65		150	°C	RM, R Package	5
Lead Temperature (Soldering, 10 sec)				300	°C		5
Thermal Resistance junction-to-ambient, 8-Lead SOIC_N (R)	θJA		158		°C/W	Device soldered in circuit board for surface-mount packages	5
Thermal Resistance junction-to-case, 8-Lead SOIC_N (R)	θJC		43		°C/W		5
Offset Voltage Drift	TCVOS		4		μV/°C		3
Input Capacitance Differential	CIN		6		pF		3
Input Capacitance Common Mode	CIN		9		pF		3
Slew Rate	SR		41		V/μs	G = 1, RL = 10 kΩ	3
Gain Bandwidth Product	GBP		50		MHz	G = 1	3
Settling Time, 0.01%			0.2		μs	G = ±1, 2 V step	3
Overload Recovery Time			0.1		μs	VIN × G = 1.48 V+	3
Overload Recovery Time			0.1		μs	VIN × G = 1.2 V+	4
Total Harmonic Distortion + Noise	THD + N		0.0006		%	G = 1, RL = 600 Ω, f = 1 kHz, VIN = 2 V p-p	3
Voltage Noise Density	en		5		nV/√Hz	f = 10 kHz	3
Voltage Noise Density	en		4.5		nV/√Hz	f = 100 kHz	3
Current Noise Density	in		4		fA/√Hz	f = 10 kHz	3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
housing	PC		Poor PC board layout, contaminants, and the board insulator	15

CAD (KiCad official)

Symbol: AD8652ARZ-REEL7
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ad8652arz-reel7-etched.step / ad8652arz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ad8652arz-reel7.step / ad8652arz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (20 pp, sha256 7105eff6fa1fb3ea, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

AD8652ARZ-REEL7

Verified AD8652ARZ-REEL7

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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