component
PIC16LF18324-I
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownPIC16LF18324-I
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-14
PIC16LF18324-I from Microchip Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; 1.8V to 3.6V for the PIC16LF18324, and a 0.1 µF decoupling capacitor is required between VDD and VSS. |
| 2 | RA5 | bidirectional | General purpose I/O (RA5) shared with ANA5, T1CKI, SOSCIN/SOSCI, CLCIN3, CLKIN and OSC1. |
| 3 | RA4 | bidirectional | General purpose I/O (RA4) shared with ANA4, T1G, SOSCO, CLKOUT (FOSC/4) and OSC2. |
| 4 | RA3/MCLR/VPP | input | Input-only RA3 that also serves as Master Clear with internal weak pull-up and as the programming voltage (VPP) input. |
| 5 | RC5 | bidirectional | General purpose I/O (RC5) shared with ANC5, MDCIN2, T3CKI, CCP1 and RX. |
| 6 | RC4 | bidirectional | General purpose I/O (RC4) shared with ANC4, T3G and CLCIN1. |
| 7 | RC3 | bidirectional | General purpose I/O (RC3) shared with ANC3, C1IN3-, C2IN3-, MDMIN, T5G, CCP2, SS1 and CLCIN0. |
| 8 | RC2 | bidirectional | General purpose I/O (RC2) shared with ANC2, C1IN2-, C2IN2- and MDCIN1. |
| 9 | RC1 | bidirectional | General purpose I/O (RC1) shared with ANC1, C1IN1-, C2IN1-, CCP4, SDI1/SDA1 (I2C) and CLCIN2. |
| 10 | RC0 | bidirectional | General purpose I/O (RC0) shared with ANC0, C2IN0+, T5CKI, SCK1 and SCL1 (I2C). |
| 11 | RA2 | bidirectional | General purpose I/O (RA2) shared with ANA2, VREF-, DAC1REF-, T0CKI, CCP3, CWG1IN, CWG2IN and INT. |
| 12 | RA1/ICSPCLK | bidirectional | General purpose I/O (RA1) shared with ANA1, VREF+, C1IN0-, C2IN0-, DAC1REF+, ICDCLK and ICSPCLK (ICSP clock). |
| 13 | RA0/ICSPDAT | bidirectional | General purpose I/O (RA0) shared with ANA0, C1IN0+, DAC1OUT, ICDDAT and ICSPDAT (ICSP data). |
| 14 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-14 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD pin voltage (PIC16LF) | VDD | -0.3 | 4 | V | with respect to VSS | 408 | |
| MCLR pin voltage | -0.3 | 9 | V | with respect to VSS | 408 | ||
| Voltage on all other pins | -0.3 | V | -0.3V to (VDD + 0.3V); upper limit printed as VDD + 0.3V | 408 | |||
| Storage temperature | -65 | 150 | °C | 408 | |||
| Ambient temperature under bias | -40 | 125 | °C | 408 | |||
| Maximum current on VSS pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 408 | |||
| Maximum current on VSS pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 408 | |||
| Maximum current on VDD pin | 250 | mA | -40°C ≤ TA ≤ +85°C | 408 | |||
| Maximum current on VDD pin | 85 | mA | +85°C ≤ TA ≤ +125°C | 408 | |||
| Maximum current on any I/O pin | 50 | mA | 408 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 408 | ||
| Total power dissipation | 800 | mW | 408 | ||||
| Operating supply voltage | VDD | 1.8 | 3.6 | V | FOSC ≤ 16 MHz | 411 | |
| Operating supply voltage | VDD | 2.5 | 3.6 | V | FOSC > 16 MHz | 411 | |
| Operating ambient temperature (Industrial) | TA | -40 | 85 | °C | Industrial | 409 | |
| RAM data retention voltage | VDR | 1.5 | V | Device in Sleep mode | 411 | ||
| Power-on Reset release voltage | VPOR | 1.6 | V | BOR and LPBOR disabled | 411 | ||
| Power-on Reset rearm voltage | VPORR | 0.8 | V | BOR and LPBOR disabled | 411 | ||
| VDD rise rate for internal POR | SVDD | 0.05 | V/ms | BOR and LPBOR disabled | 411 | ||
| Supply current XT 4 MHz | IDDXT4 | 309 | 400 | uA | XT = 4 MHz, 3.0V | 413 | |
| Supply current HFINTOSC 16 MHz | IDDHFO16 | 1.2 | 1.6 | mA | HFINTOSC = 16 MHz, 3.0V | 413 | |
| Supply current HFINTOSC 32 MHz | IDDHFOPLL | 2.3 | 3.1 | mA | HFINTOSC = 32 MHz, 3.0V | 413 | |
| Supply current HS+PLL 32 MHz | IDDHSPLL32 | 2.2 | 2.9 | mA | HS+PLL = 32 MHz, 3.0V | 413 | |
| Supply current IDLE mode | IDDIDLE | 774 | 1100 | uA | IDLE Mode, HFINTOSC = 16 MHz, 3.0V | 413 | |
| Power-down current base (max +85°C) | IPD | 0.03 | 2 | µA | 3.0V, VREGPM = 1, Max at +85°C | 414 | |
| Power-down current base (max +125°C) | IPD | 0.03 | 5.2 | µA | 3.0V, VREGPM = 1, Max at +125°C | 414 | |
| Watchdog/LFINTOSC power-down current | IPD_WDT | 0.4 | 2.9 | µA | 3.0V, Max at +85°C | 414 | |
| Secondary oscillator power-down current | IPD_SOSC | 1.3 | 2.8 | µA | 3.0V, Max at +85°C | 414 | |
| Brown-out Reset power-down current | IPD_BOR | 10.6 | 16 | µA | 3.0V, Max at +85°C | 414 | |
| Input low voltage, TTL buffer | VIL | 0.15 | xVDD | 1.8V ≤ VDD ≤ 4.5V | 415 | ||
| Input low voltage, Schmitt Trigger | VIL | 0.2 | xVDD | 2.0V ≤ VDD ≤ 5.5V | 415 | ||
| Input low voltage, I2C levels | VIL | 0.3 | xVDD | 415 | |||
| Input low voltage, SMBus levels | VIL | 0.8 | V | 2.7V ≤ VDD ≤ 5.5V | 415 | ||
| Input low voltage, MCLR | VIL | 0.2 | xVDD | 415 | |||
| Input high voltage, Schmitt Trigger | VIH | 0.8 | xVDD | 2.0V ≤ VDD ≤ 5.5V | 415 | ||
| Input high voltage, I2C levels | VIH | 0.7 | xVDD | 415 | |||
| Input high voltage, SMBus levels | VIH | 2.1 | V | 2.7V ≤ VDD ≤ 5.5V | 415 | ||
| Input high voltage, MCLR | VIH | 0.7 | xVDD | 415 | |||
| Input leakage current, I/O ports | IIL | -125 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 415 | |
| Input leakage current, I/O ports | IIL | -1000 | 1000 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 125°C | 415 | |
| Input leakage current, MCLR | IIL | -200 | 200 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 415 | |
| Weak pull-up current | IPUR | 25 | 120 | 200 | µA | VDD = 3.0V, VPIN = VSS | 415 |
| Output low voltage, I/O ports | VOL | 0.6 | V | IOL = 10.0 mA, VDD = 3.0V | 415 | ||
| I/O pin capacitance | CIO | 5 | 50 | pF | All I/O pins | 415 | |
| Brown-out Reset voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 424 |
| Brown-out Reset voltage | VBOR | 1.8 | 1.9 | 2.1 | V | BORV = 1 (PIC16LF18324/18344) | 424 |
| Brown-out Reset hysteresis | VBORHYS | 0 | 25 | 75 | mV | 424 | |
| Low-Power BOR voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | PIC16LF18324/18344 | 424 |
| Watchdog Timer time-out period | TWDT | 10 | 16 | 27 | ms | 16 ms Nominal Reset Time | 424 |
| Power-up Timer period | TPWRT | 40 | 65 | 140 | ms | 424 | |
| System clock frequency | FOSC | 32 | MHz | 419 | |||
| ADC integral error | EIL | -1 | 1 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 425 | |
| ADC offset error | EOFF | -2 | 0.5 | 2 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 425 |
| ADC gain error | EGN | -2 | 0.2 | 2 | LSb | ADCREF+ = 3.0V, ADCREF- = 0V | 425 |
| Comparator input offset voltage | VIOFF | -50 | 50 | mV | VICM = VDD/2 | 428 | |
| FVR 1x gain accuracy | VFVR1 | -4 | 4 | % | VDD ≥ 2.5V, -40°C to 85°C | 428 | |
| Thermal resistance junction to ambient, 14-pin SOIC | θJA | 95.3 | °C/W | 14-pin SOIC package | 417 | ||
| Thermal resistance junction to case, 14-pin SOIC | θJC | 31 | °C/W | 14-pin SOIC package | 417 | ||
| Maximum junction temperature | TJMAX | 150 | °C | 417 | |||
| Power dissipation | PD | 0.8 | W | PD = PINTERNAL + PI/O | 417 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PPS | BODY RxyPPS | 276 |
CAD (KiCad official)
- Symbol:
PIC16LF18324-I - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
pic16lf18324-i-etched.step/pic16lf18324-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16lf18324-i.step/pic16lf18324-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (489 pp, sha256
ef07a4c4e86158f1, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).