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SN74LVC1G125 3-State Buffer

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Single 3-state buffer

logicsingle-gatelvccmostisot-23-5
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Contents

README

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SN74LVC1G125

Texas Instruments · Logic Gate · SOT-23-5

The SN74LVC1G125 is a single non-inverting buffer with a 3-state output controlled by an active-low output-enable. When disabled the output goes high-impedance, so it can drive or isolate a single line on a shared bus. It runs from 1.65 V to 5.5 V with 5 V-tolerant inputs.

Pinout

Pin Name Type Function
1 OE input Active-low output enable. When OE is low, the Y output follows A; when OE is high, Y is placed in a high-impedance (3-state) state. To guarantee Hi-Z during power-up/power-down, pull OE up to VCC through a resistor sized to the driver's sinking capability.
2 A input Data input to the buffer. Accepts input levels up to 5.5 V independent of VCC (supports voltage down-translation). VIH/VIL thresholds are VCC-dependent per §5.3 Recommended Operating Conditions.
3 GND power_in Device ground reference (0 V). Continuous current through VCC or GND must not exceed ±100 mA.
4 Y tri_state Buffered 3-state output. Drives ±24 mA at VCC = 3 V and ±32 mA at VCC = 4.5 V. High-impedance when OE is high; also supports Ioff live-insertion and back-drive protection when VCC = 0.
5 VCC power_in Positive supply. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Bypass with a local ceramic capacitor to GND. ICC max 10 µA (static).

Key specifications

Parameter Value
Type Single 3-state buffer
Logic family LVC (CMOS)
Supply voltage 1.65 V to 5.5 V
Input tolerance 5 V tolerant
Propagation delay 4.6 ns typ at 3.3 V
Operating temperature -40 C to 125 C

Ordering variants

Same part, different packaging or reel option.

  • SN74LVC1G125DBV
  • SN74LVC1G125DBVR
  • SN74LVC1G125DBVT
  • SN74LVC1G125DCK
  • SN74LVC1G125DCKR
  • SN74LVC1G125DCKT
  • SN74LVC1G125DRL
  • SN74LVC1G125DRLR
  • SN74LVC1G125DRY
  • SN74LVC1G125DRYR
  • SN74LVC1G125DSF
  • SN74LVC1G125DSFR
  • SN74LVC1G125DPW
  • SN74LVC1G125DPWR
  • SN74LVC1G125YZP
  • SN74LVC1G125YZPR

CAD (KiCad official)

  • Symbol: sn74lvc1g125.kicad_sym
  • Footprint: sn74lvc1g125.kicad_mod
  • 3D model: SOT-23-5 body from KiCad Package_TO_SOT_SMD/SOT-23-5.
  • 3D model files: sn74lvc1g125-etched.step / sn74lvc1g125-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74lvc1g125.step / sn74lvc1g125.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 65afa3f9d879b37c, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF