component
CD4098BPWR
Public Made by Adomby adom
Texas Instruments Monostable Multivibrators, TSSOP-16. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4098BPWR
Texas Instruments · Monostable Multivibrators · TSSOP-16
CD4098BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CX1 | passive | External capacitor terminal for MONO1, electrically connected internally to VSS (terminals 1, 8, 15). |
| 2 | RXCX(1) | passive | Common external resistor/capacitor junction for MONO1 timing, with RX tied to VDD and minimum RX of 5 kΩ and maximum CX of 100 µF. |
| 3 | RESET(1) | input | Active-low reset for MONO1 that immediately terminates the output pulse; tie to VDD if unused, or to VSS if the entire section is unused. |
| 4 | +TR(1) | input | Leading-edge trigger input for MONO1; tie to VSS if unused. |
| 5 | -TR(1) | input | Trailing-edge trigger input for MONO1; tie to VDD if unused. |
| 6 | Q1 | output | Buffered Q output of MONO1. |
| 7 | Q1_N | output | Buffered complementary (Q-bar) output of MONO1. |
| 8 | VSS | power_in | Ground/negative supply terminal, electrically connected internally to terminals 1 and 15. |
| 9 | Q2_N | output | Buffered complementary (Q-bar) output of MONO2. |
| 10 | Q2 | output | Buffered Q output of MONO2. |
| 11 | -TR(2) | input | Trailing-edge trigger input for MONO2; tie to VDD if unused. |
| 12 | +TR(2) | input | Leading-edge trigger input for MONO2; tie to VSS if unused. |
| 13 | RESET(2) | input | Active-low reset for MONO2 that immediately terminates the output pulse; tie to VDD if unused, or to VSS if the entire section is unused. |
| 14 | RXCX(2) | passive | Common external resistor/capacitor junction for MONO2 timing, with RX tied to VDD and minimum RX of 5 kΩ and maximum CX of 100 µF. |
| 15 | CX2 | passive | External capacitor terminal for MONO2, electrically connected internally to VSS (terminals 1, 8, 15). |
| 16 | VDD | power_in | Positive supply terminal, recommended 3 V to 18 V, absolute maximum -0.5 V to +20 V relative to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
CD4098BPWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
cd4098bpwr-etched.step/cd4098bpwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4098bpwr.step/cd4098bpwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
699241f92bb31789, retrieved 2026-10-26, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).