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TPAFE5160SI08-QP7R

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3PEAK Analog To Digital Converters (ADC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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TPAFE5160SI08-QP7R

3PEAK · Analog To Digital Converters (ADC) · LQFP-64(10x10)

TPAFE5160SI08-QP7R from 3PEAK, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AVDD power_in Analog supply pin.
2 AGND power_in Analog ground pin.
3 OS0 input Oversampling control pin; OS[2:0] sets the oversampling ratio from 1 (no OS, 350 kSPS) to 64 (5.47 kSPS per channel).
4 OS1 input Oversampling control pin; OS[2:0] sets the oversampling ratio from 1 (no OS, 350 kSPS) to 64 (5.47 kSPS per channel).
5 OS2 input Oversampling control pin; OS[2:0] sets the oversampling ratio from 1 (no OS, 350 kSPS) to 64 (5.47 kSPS per channel).
6 PAR/SER/BYTE SEL input Control pin to select serial, parallel, or parallel byte interface mode.
7 STBY input Control pin to select standby or shutdown mode, active low.
8 RANGE input Multi-function input: when STBY is low it selects standby or shutdown mode, and when STBY is high it selects the ±10 V (high) or ±5 V (low) input range.
9 CONVSTA input Active high logic input that simultaneously samples and starts conversion for channels 1-4.
10 CONVSTB input Active high logic input that simultaneously samples and starts conversion for channels 5-8.
11 RESET input Active high logic input that resets the device digital logic asynchronously; the device stays in reset while the pin is high.
12 RD/SCLK input Multi-function input: active-low ready input in parallel and parallel byte modes, and clock input in serial mode.
13 CS input Active low logic input chip-select signal.
14 BUSY output Active high digital output indicating an ongoing conversion.
15 FRSTDATA output Active high digital output indicating data read back from channel 1 of the device.
16 DB0 output Data output DB0 (LSB) in parallel interface mode.
17 DB1 output Data output DB1 in parallel interface mode.
18 DB2 output Data output DB2 in parallel interface mode.
19 DB3 output Data output DB3 in parallel interface mode.
20 DB4 output Data output DB4 in parallel interface mode.
21 DB5 output Data output DB5 in parallel interface mode.
22 DB6 output Data output DB6 in parallel interface mode.
23 DVDD power_in Digital supply pin; decouple with AGND on pin 26.
24 DB7/DOUTA output Multi-function output: data output DB7 in parallel and parallel byte modes, or data output DOUTA in serial mode.
25 DB8/DOUTB output Multi-function output: data output DB8 in parallel and parallel byte modes, or data output DOUTB in serial mode.
26 AGND power_in Analog ground pin.
27 DB9 output Data output DB9 in parallel interface mode.
28 DB10 output Data output DB10 in parallel interface mode.
29 DB11 output Data output DB11 in parallel interface mode.
30 DB12 output Data output DB12 in parallel interface mode.
31 DB13 output Data output DB13 in parallel interface mode.
32 DB14/HBEN output Multi-function pin: data output DB14 in parallel mode, or control input for byte selection (high or low) in parallel byte mode.
33 DB15/BYTE SEL output Multi-function pin: data output DB15 (MSB) in parallel mode, or active high control input that enables parallel byte mode.
34 REFSEL input Active high logic input that enables the internal 2.5 V reference; low disables it and requires an external reference on REFIN/REFOUT.
35 AGND power_in Analog ground pin.
36 REGCAP1 output Output pin 1 for the internal voltage regulator; decouple separately to AGND using a 1-μF capacitor, typical 4 V.
37 AVDD power_in Analog supply pin.
38 AVDD power_in Analog supply pin.
39 REGCAP2 output Output pin 2 for the internal voltage regulator; decouple separately to AGND using a 1-μF capacitor, typical 4 V.
40 AGND power_in Analog ground pin.
41 AGND power_in Analog ground pin.
42 REFIN/REFOUT bidirectional Internal 2.5 V reference output when REFSEL is high, or external reference input when REFSEL is low; decouple with REFGND on pin 43 using a 10-μF capacitor.
43 REFGND power_in Reference ground pin; must be shorted to the analog GND plane and decoupled with REFIN/REFOUT on pin 42 using a 10-μF capacitor.
44 REFCAPA output Reference amplifier output; must be shorted to REFCAPB and decoupled to AGND with a low ESR 10-μF ceramic capacitor, typical 4 V.
45 REFCAPB output Reference amplifier output; must be shorted to REFCAPA and decoupled to AGND with a low ESR 10-μF ceramic capacitor, typical 4 V.
46 REFGND power_in Reference ground pin; must be shorted to the analog GND plane and decoupled with REFIN/REFOUT on pin 42 using a 10-μF capacitor.
47 AGND power_in Analog ground pin.
48 AVDD power_in Analog supply pin.
49 AIN_1P bidirectional Analog input channel 1 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
50 AIN_1GND bidirectional Analog input channel 1 negative input; should be tied to GND, and allows a ±0.3 V range.
51 AIN_2P bidirectional Analog input channel 2 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
52 AIN_2GND bidirectional Analog input channel 2 negative input; should be tied to GND, and allows a ±0.3 V range.
53 AIN_3P bidirectional Analog input channel 3 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
54 AIN_3GND bidirectional Analog input channel 3 negative input; should be tied to GND, and allows a ±0.3 V range.
55 AIN_4P bidirectional Analog input channel 4 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
56 AIN_4GND bidirectional Analog input channel 4 negative input; should be tied to GND, and allows a ±0.3 V range.
57 AIN_5P bidirectional Analog input channel 5 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
58 AIN_5GND bidirectional Analog input channel 5 negative input; should be tied to GND, and allows a ±0.3 V range.
59 AIN_6P bidirectional Analog input channel 6 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
60 AIN_6GND bidirectional Analog input channel 6 negative input; should be tied to GND, and allows a ±0.3 V range.
61 AIN_7P bidirectional Analog input channel 7 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
62 AIN_7GND bidirectional Analog input channel 7 negative input; should be tied to GND, and allows a ±0.3 V range.
63 AIN_8P bidirectional Analog input channel 8 positive input; accepts ±10 V or ±5 V bipolar input per RANGE pin, with input clamp to ±30 V (typical).
64 AIN_8GND bidirectional Analog input channel 8 negative input; should be tied to GND, and allows a ±0.3 V range.

Key specifications

Parameter Value
Manufacturer 3PEAK
Package LQFP-64(10x10)
Category Data Acquisition
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
AVDD Analog supply voltage AVDD 4.75 5 5.25 V 9
SNR, ±10V range, no oversampling SNR 86 89.7 dB fin=1kHz sine wave; ±10V; no oversampling 10
SNR, ±5V range, no oversampling SNR 85.5 89.5 dB fin=1kHz sine wave; ±5V; no oversampling 10
SNR, ±10V range, oversampling by 16 SNR 91 95.2 dB fin=130Hz; oversampling by 16; ±10V range 10
SNR, ±5V range, oversampling by 16 SNR 91 94.7 dB fin=130Hz; oversampling by 16; ±5V range 10
Differential nonlinearity (DNL) DNL -0.99 0.5 1.5 LSB fSAMPLE = 200 kSPS, -40~85℃ 11
Integral nonlinearity (INL) at 200 kSPS INL 0.7 2 LSB fSAMPLE = 200 kSPS, -40~85℃ 11
Integral nonlinearity (INL) at 350 kSPS INL 1 2.5 LSB fSAMPLE = 350 kSPS, -40~85℃ 11
Positive and negative full-scale error, external reference 4 50 LSB Ext reference 11
DVDD Digital supply voltage DVDD 1.71 3.3 V 9
AVDD to AGND AVDD -0.3 7 V 9
DVDD to DGND DVDD -0.3 7 V 9
AGND to DGND -0.3 0.3 V 9
Analog input voltage to AGND -15 15 V 9
Digital input to DGND -0.3 V 9
REFI to AGND REFI -0.3 V 9
Input current to any pin except supplies -10 10 mA 9
Maximum junction temperature TJ -40 150 °C 9
Operating temperature range TA -40 125 °C 9
Storage temperature range TSTG -65 150 °C 9
Lead temperature (soldering, 10 sec) 260 °C Soldering 10 sec 9
Human body model ESD, all pins except analog inputs HBM -5000 5000 V JEDEC JS-001 9
Human body model ESD, analog input pins HBM -7000 7000 V JEDEC JS-001 9
Charged device model ESD CDM -1500 1500 V JEDEC JS-002 9
SINAD, ±10V range, no oversampling SINAD 89.5 dB fin=1kHz sine wave; ±10V; no oversampling 10
SINAD, ±5V range, no oversampling SINAD 89.4 dB fin=1kHz sine wave; ±5V; no oversampling 10
Total harmonic distortion THD -106 dB All input range; fin=1kHz 10
Spurious free dynamic range SFDR -106 dB fin=1kHz 10
Small signal bandwidth -3dB, low bandwidth mode, ±10V BW(-3 dB) 20 KHz -3dB; ±10V; Low Bandwidth Mode 10
Small signal bandwidth -3dB, low bandwidth mode, ±5V BW(-3 dB) 12.7 KHz -3dB; ±5V; Low Bandwidth Mode 10
Small signal bandwidth -3dB, high bandwidth mode, ±10V BW(-3 dB) 26.5 KHz -3dB; ±10V; High Bandwidth Mode 10
Small signal bandwidth -3dB, high bandwidth mode, ±5V BW(-3 dB) 16.4 KHz -3dB; ±5V; High Bandwidth Mode 10
Small signal bandwidth -0.1dB, low bandwidth mode, ±10V BW(-0.1 dB) 3.3 KHz -0.1dB; ±10V; Low Bandwidth Mode 11
Small signal bandwidth -0.1dB, low bandwidth mode, ±5V BW(-0.1 dB) 2.2 KHz -0.1dB; ±5V; Low Bandwidth Mode 11
Small signal bandwidth -0.1dB, high bandwidth mode, ±10V BW(-0.1 dB) 4.3 KHz -0.1dB; ±10V; High Bandwidth Mode 11
Small signal bandwidth -0.1dB, high bandwidth mode, ±5V BW(-0.1 dB) 2.6 KHz -0.1dB; ±5V; High Bandwidth Mode 11
Group delay, low bandwidth mode, ±10V Tgroup_delay 10 us Low Bandwidth Mode; ±10V 11
Group delay, low bandwidth mode, ±5V Tgroup_delay 16 us Low Bandwidth Mode; ±5V 11
Group delay, high bandwidth mode, ±10V Tgroup_delay 8 us High Bandwidth Mode; ±10V 11
Group delay, high bandwidth mode, ±5V Tgroup_delay 12 us High Bandwidth Mode; ±5V 11
Resolution 16 bit No missing code 11
Positive and negative full-scale error, internal reference 15 LSB Int reference 11
Thermal resistance, junction-to-ambient, QFP10X10-64 θJA 46 °C/W 9
Thermal resistance, junction-to-case (top), QFP10X10-64 θJC(top) 7.8 °C/W 9

CAD (KiCad official)

  • Symbol: TPAFE5160SI08-QP7R
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: tpafe5160si08-qp7r-etched.step / tpafe5160si08-qp7r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpafe5160si08-qp7r.step / tpafe5160si08-qp7r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: 3PEAK datasheet (29 pp, sha256 11e235586b536704, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF