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Chipfit — 3D Chip ↔ KiCad Footprint Validator

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by Kyle Bergstedt

Pair a .glb chip model with its .kicad_mod footprint in a Hydrogen webview. Validates package family, pin count, seat-plane Δz, size-match. Bake a persistent pin-1 registration dot onto the chip GLB.

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adom-chipfit

3D chip ↔ KiCad footprint validator. Pair a .glb model with a .kicad_mod footprint in a Hydrogen webview and run the full validation stack before committing either to a library.

What it checks

Check What it catches
Package-family + pin-count guard Refuses a QFN-24 chip on an LQFP-48 footprint before the viewer even binds a port. Alias groups: LQFP/TQFP/QFP, QFN/DFN, TSSOP/SSOP/SOIC/SOP/SO, DIP/PDIP, SOT/SOD, BGA/CSP.
Seat-plane Δz Chip floating above the pads or sinking into the board. Thru-hole parts get a separate acceptance band (leads clear a standard 1.6 mm FR4).
Size-match ratio FP bbox vs GLB bbox — flags wrong-size pairs and overrun leads.
Pin-1 alignment Overlays a red ring at the footprint's pin-1 pad so the engineer can confirm the chip's own pin-1 mark lands there.
Origin-convention classifier A GLB authored with z=0 at the board bottom (Fusion/SolidWorks default) is auto-aligned for display with the convention offset surfaced, not flagged red.

Persistent pin-1 registration

Once the checks pass, click Bake pin-1 → GLB to write a flat red disc onto the chip's top-surface corner nearest pin 1 and save a <source>-pin1.glb next to the source. Every downstream viewer (adom-tsci, basic-3d-viewer, InstaPCB preview, molecule review) renders the dot automatically. The chip becomes self-identifying across every future project the user builds with it.

AI-drivable

Every UI action has an HTTP endpoint (app-creator §7):

GET  /meta              → { footprint_name, glb_name, port }
GET  /check             → latest HUD snapshot (JSON)
POST /check             → UI pushes HUD state here
GET  /camera-pending    → server→UI camera command channel
POST /camera            → { view: top|front|right|iso } or
                          { alpha, beta, radius }
POST /bake-pin1         → application/gltf-binary body; writes next
                          to source with -pin1 suffix
POST /shutdown          → clean exit

curl $PORT/check | jq -r .provenance prints the full pipeline for audit.

Install

curl -fsSL https://wiki-ufypy5dpx93o.adom.cloud/static/apps/adom-chipfit/adom-chipfit \
  -o /tmp/adom-chipfit \
  && chmod +x /tmp/adom-chipfit \
  && sudo install -m 0755 /tmp/adom-chipfit /usr/local/bin/adom-chipfit \
  && adom-chipfit install
  • adom-parts-search — source and price the chip you're validating.
  • adom-molecule — convert STEP → GLB if you only have a STEP file.
  • electrical-engineering skill §8 — the underlying EE conventions (z=0 at top copper, bake pin-1, package family aliases).