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ZXMP3A16N8TA-VB

VBsemi Elec · MOSFETs · SO-8

ZXMP3A16N8TA-VB from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the P-channel MOSFET (VDS -30 V, continuous source current IS -2.3 A at 10 s, -1.1 A steady state).
2 S passive Source of the P-channel MOSFET, tied to the same source as pins 1 and 3.
3 S passive Source of the P-channel MOSFET, tied to the same source as pins 1 and 2.
4 G input Gate of the P-channel MOSFET; gate-source voltage limited to ±20 V with threshold of -0.7 to -2.0 V.
5 D passive Drain of the P-channel MOSFET (VDS -30 V, pulsed drain current IDM -30 A), connected to pins 6, 7 and 8.
6 D passive Drain of the P-channel MOSFET, tied to the same drain as pins 5, 7 and 8.
7 D passive Drain of the P-channel MOSFET, tied to the same drain as pins 5, 6 and 8.
8 D passive Drain of the P-channel MOSFET, tied to the same drain as pins 5, 6 and 7.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate Threshold Voltage VGS(th) -2 -0.7 V VDS = VGS, ID = - 250 µA 2
Gate-Body Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS -1 µA VDS = - 30 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS -5 µA VDS = - 30 V, VGS = 0 V, TJ = 70 °C 2
On-State Drain Current ID(on) -20 A VDS ≤ - 10 V, VGS = - 10 V 2
On-State Drain Current ID(on) -5 A VDS ≤ - 5 V, VGS = - 4.5 V 2
Diode Forward Voltage VSD -0.8 -1.1 V IS = - 2.3 A, VGS = 0 V 2
Drain-Source On-State Resistance RDS(on) 0.033 Ω VGS = - 10 V, ID = - 5.8 A 2
Drain-Source On-State Resistance RDS(on) 0.043 Ω VGS = - 6 V, ID = - 5 A 2
Drain-Source On-State Resistance RDS(on) 0.056 Ω VGS = - 4.5 V, ID = - 4.4 A 2
Forward Transconductance gfs 13 S VDS = - 15 V, ID = - 5.8 A 2
Turn-On Delay Time td(on) 14 25 ns VDD = - 15 V, RL = 15 Ω, ID ≅ - 1 A, VGEN = - 10 V, Rg = 6 Ω 2
Rise Time tr 14 25 ns VDD = - 15 V, RL = 15 Ω, ID ≅ - 1 A, VGEN = - 10 V, Rg = 6 Ω 2
Turn-Off Delay Time td(off) 42 70 ns VDD = - 15 V, RL = 15 Ω, ID ≅ - 1 A, VGEN = - 10 V, Rg = 6 Ω 2
Fall Time tf 30 50 ns VDD = - 15 V, RL = 15 Ω, ID ≅ - 1 A, VGEN = - 10 V, Rg = 6 Ω 2
Source-Drain Reverse Recovery Time trr 30 60 ns IF = - 1.2 A, dI/dt = 100 A/µs 2
Total Gate Charge Qg 16 nC VDS = - 15 V, VGS = - 10 V, ID = - 3.5 A 2
Gate-Source Charge Qgs 2.3 nC VDS = - 15 V, VGS = - 10 V, ID = - 3.5 A 2
Gate-Drain Charge Qgd 4.5 nC VDS = - 15 V, VGS = - 10 V, ID = - 3.5 A 2
Gate Resistance Rg 8.8 Ω 2
Drain-Source Voltage VDS -30 V TA = 25 °C 1
Gate-Source Voltage VGS -20 20 V TA = 25 °C 1
Continuous Drain Current ID -5.8 A TJ = 150 °C, TA = 25 °C, 10 s 1
Continuous Drain Current ID -4.1 A TJ = 150 °C, TA = 25 °C, steady state 1
Continuous Drain Current ID -4.6 A TJ = 150 °C, TA = 70 °C, 10 s 1
Continuous Drain Current ID -3.2 A TJ = 150 °C, TA = 70 °C, steady state 1
Pulsed Drain Current IDM -30 A TA = 25 °C 1
Continuous Source Current (Diode Conduction) IS -2.3 A 10 s 1
Continuous Source Current (Diode Conduction) IS -1.1 A Steady state 1
Maximum Power Dissipation PD 2.5 W TA = 25 °C, 10 s 1
Maximum Power Dissipation PD 1.3 W TA = 25 °C, steady state 1
Maximum Power Dissipation PD 1.6 W TA = 70 °C, 10 s 1
Maximum Power Dissipation PD 0.8 W TA = 70 °C, steady state 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 40 50 °C/W t ≤ 10 s 1
Maximum Junction-to-Ambient RthJA 70 95 °C/W Steady State 1
Maximum Junction-to-Foot (Drain) RthJF 24 30 °C/W Steady State 1

CAD (KiCad official)

  • Symbol: ZXMP3A16N8TA-VB
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: zxmp3a16n8ta-vb-etched.step / zxmp3a16n8ta-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zxmp3a16n8ta-vb.step / zxmp3a16n8ta-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (8 pp, sha256 35bc21807fd11715, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF