# ZXMC4559DN8TA

**TECH PUBLIC** · MOSFETs · SOP-8

ZXMC4559DN8TA from TECH PUBLIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of the N-channel MOSFET (Q1, VDS = 60V, ID = 6.0A, RDS(ON) < 35mΩ at VGS=10V). |
| 2 | G1 | input | Gate of the N-channel MOSFET (Q1), with absolute maximum VGS of ±20V. |
| 3 | S2 | passive | Source of the P-channel MOSFET (Q2, VDS = -60V, ID = -5A, RDS(ON) < 95mΩ at VGS=-10V). |
| 4 | G2 | input | Gate of the P-channel MOSFET (Q2), with absolute maximum VGS of ±20V. |
| 5 | D2 | passive | Drain of the P-channel MOSFET (Q2), tied internally with pin 6; VDS = -60V maximum. |
| 6 | D2 | passive | Drain of the P-channel MOSFET (Q2), tied internally with pin 5; pulsed drain current IDM = -25A. |
| 7 | D1 | passive | Drain of the N-channel MOSFET (Q1), tied internally with pin 8; VDS = 60V maximum. |
| 8 | D1 | passive | Drain of the N-channel MOSFET (Q1), tied internally with pin 7; pulsed drain current IDM = 40A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `ZXMC4559DN8TA`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `zxmc4559dn8ta-etched.step` / `zxmc4559dn8ta-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `zxmc4559dn8ta.step` / `zxmc4559dn8ta.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590279076456919040) (8 pp, sha256 `7424c4e98cdca8c3`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/zxmc4559dn8ta-datasheet.pdf)