component
ZXGD3105N8TC
Public Made by Adomby adom
Diodes Incorporated Gate Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ZXGD3105N8TC
Diodes Incorporated · Gate Drivers · SO-8
ZXGD3105N8TC from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin that should be closely decoupled to ground with a ceramic capacitor; the datasheet rates VCC at 25 V maximum relative to GND and allows operation from 4.5 V. |
| 2 | DNC | unconnected | Do not connect; leave this pin floating. |
| 3 | BIAS | input | Connect to VCC through RBIAS to source 0.54 mA into this pin (18 kΩ at VCC = 10 V), which sets the gate driver peak source current; the bias pin voltage is rated at VCC. |
| 4 | DRAIN | input | Drain sense pin to be connected directly to the synchronous MOSFET drain terminal; the drain pin voltage is rated from -3 V to +100 V. |
| 5 | REF | input | Connect to VCC through RREF to source 1.02 mA into this pin (9.1 kΩ at VCC = 10 V), which sets the gate driver peak sink current and the turn-off threshold together with BIAS. |
| 6 | DNC | unconnected | Do not connect; leave this pin floating. |
| 7 | GND | power_in | Ground reference and current return for the gate driver; connect to the synchronous MOSFET source terminal and keep the ground return loop as short as possible. |
| 8 | GATE | output | Gate drive output that sinks and sources current to the synchronous MOSFET gate; the gate output voltage is rated -3 V to VCC + 3 V, with peak source current 4 A and peak sink current 9 A. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Turn-Off Threshold Voltage | VT | -20 | -10 | 0 | mV | VG = 1V | 4 |
| Gate Output Voltage (capacitive load, gate output voltage only) | VG(off) | 0.2 | 0.6 | V | VDRAIN ≥ 1V | 4 | |
| Gate Voltage | VG | 5 | 7.8 | V | VDRAIN = -50mV | 4 | |
| Gate Voltage | VG | 8 | 9.4 | V | VDRAIN = -100mV | 4 | |
| Supply Voltage, Relative to GND | VCC | 25 | V | Relative to GND | 3 | ||
| Drain Pin Voltage | VD | -3 | 100 | V | 3 | ||
| Gate output Voltage (max VCC + 3 V) | VG | -3 | V | 3 | |||
| Gate Driver Peak Source Current | ISOURCE | 4 | A | 3 | |||
| Gate Driver Peak Sink Current | ISINK | 9 | A | 3 | |||
| Reference Current | IREF | 25 | mA | 3 | |||
| Bias Current | IBIAS | 100 | mA | 3 | |||
| Power Dissipation | PD | 490 | mW | Note 5: minimum recommended pad layout, FR4, still air | 3 | ||
| Power Dissipation | PD | 655 | mW | Note 6: pins 1 and 7 to 5mm x 5mm 1oz copper heatsinks | 3 | ||
| Power Dissipation | PD | 720 | mW | Note 7: pins 1 and 7 to 10mm x 10mm 1oz copper heatsinks | 3 | ||
| Power Dissipation | PD | 785 | mW | Note 8: pins 1 and 7 to 15mm x 15mm 1oz copper heatsinks | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 255 | °C/W | Note 5: minimum recommended pad layout, FR4, still air | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 191 | °C/W | Note 6: pins 1 and 7 to 5mm x 5mm 1oz copper heatsinks | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 173 | °C/W | Note 7: pins 1 and 7 to 10mm x 10mm 1oz copper heatsinks | 3 | ||
| Thermal Resistance, Junction to Ambient | RθJA | 159 | °C/W | Note 8: pins 1 and 7 to 15mm x 15mm 1oz copper heatsinks | 3 | ||
| Thermal Resistance, Junction to Lead | RθJL | 55 | °C/W | Note 9: junction to solder point at pin 1 (VCC) or pin 7 (GND) | 3 | ||
| Thermal Resistance, Junction to Case | RθJC | 45 | °C/W | Note 10: junction to top of case | 3 | ||
| Operating Temperature Range | TJ | -40 | 150 | °C | 3 | ||
| Storage Temperature Range | TSTG | -55 | 150 | °C | 3 | ||
| Electrostatic Discharge - Human Body Model | ESD HBM | 4000 | V | JEDEC class 3A (JESD22-A114) | 3 | ||
| Electrostatic Discharge - Machine Model | ESD MM | 200 | V | JEDEC class B (JESD22-A115) | 3 | ||
| Supply Voltage (operating range, from application text) | VCC | 4.5 | V | Application Information: controller operates from VCC of 4.5V | 11 | ||
| Operating Frequency (from features list) | 500 | kHz | Features: operation up to 500kHz | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
CAD (KiCad official)
- Symbol:
ZXGD3105N8TC - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
zxgd3105n8tc-etched.step/zxgd3105n8tc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);zxgd3105n8tc.step/zxgd3105n8tc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (14 pp, sha256
bf6cfb04d3bc02f0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ZXGD3105N8TC
**Diodes Incorporated** · Gate Drivers · SO-8
ZXGD3105N8TC from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Power supply pin that should be closely decoupled to ground with a ceramic capacitor; the datasheet rates VCC at 25 V maximum relative to GND and allows operation from 4.5 V. |
| 2 | DNC | unconnected | Do not connect; leave this pin floating. |
| 3 | BIAS | input | Connect to VCC through RBIAS to source 0.54 mA into this pin (18 kΩ at VCC = 10 V), which sets the gate driver peak source current; the bias pin voltage is rated at VCC. |
| 4 | DRAIN | input | Drain sense pin to be connected directly to the synchronous MOSFET drain terminal; the drain pin voltage is rated from -3 V to +100 V. |
| 5 | REF | input | Connect to VCC through RREF to source 1.02 mA into this pin (9.1 kΩ at VCC = 10 V), which sets the gate driver peak sink current and the turn-off threshold together with BIAS. |
| 6 | DNC | unconnected | Do not connect; leave this pin floating. |
| 7 | GND | power_in | Ground reference and current return for the gate driver; connect to the synchronous MOSFET source terminal and keep the ground return loop as short as possible. |
| 8 | GATE | output | Gate drive output that sinks and sources current to the synchronous MOSFET gate; the gate output voltage is rated -3 V to VCC + 3 V, with peak source current 4 A and peak sink current 9 A. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Turn-Off Threshold Voltage | VT | -20 | -10 | 0 | mV | VG = 1V | 4 |
| Gate Output Voltage (capacitive load, gate output voltage only) | VG(off) | | 0.2 | 0.6 | V | VDRAIN ≥ 1V | 4 |
| Gate Voltage | VG | 5 | 7.8 | | V | VDRAIN = -50mV | 4 |
| Gate Voltage | VG | 8 | 9.4 | | V | VDRAIN = -100mV | 4 |
| Supply Voltage, Relative to GND | VCC | | | 25 | V | Relative to GND | 3 |
| Drain Pin Voltage | VD | -3 | | 100 | V | | 3 |
| Gate output Voltage (max VCC + 3 V) | VG | -3 | | | V | | 3 |
| Gate Driver Peak Source Current | ISOURCE | | | 4 | A | | 3 |
| Gate Driver Peak Sink Current | ISINK | | | 9 | A | | 3 |
| Reference Current | IREF | | | 25 | mA | | 3 |
| Bias Current | IBIAS | | | 100 | mA | | 3 |
| Power Dissipation | PD | | | 490 | mW | Note 5: minimum recommended pad layout, FR4, still air | 3 |
| Power Dissipation | PD | | | 655 | mW | Note 6: pins 1 and 7 to 5mm x 5mm 1oz copper heatsinks | 3 |
| Power Dissipation | PD | | | 720 | mW | Note 7: pins 1 and 7 to 10mm x 10mm 1oz copper heatsinks | 3 |
| Power Dissipation | PD | | | 785 | mW | Note 8: pins 1 and 7 to 15mm x 15mm 1oz copper heatsinks | 3 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 255 | °C/W | Note 5: minimum recommended pad layout, FR4, still air | 3 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 191 | °C/W | Note 6: pins 1 and 7 to 5mm x 5mm 1oz copper heatsinks | 3 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 173 | °C/W | Note 7: pins 1 and 7 to 10mm x 10mm 1oz copper heatsinks | 3 |
| Thermal Resistance, Junction to Ambient | RθJA | | | 159 | °C/W | Note 8: pins 1 and 7 to 15mm x 15mm 1oz copper heatsinks | 3 |
| Thermal Resistance, Junction to Lead | RθJL | | | 55 | °C/W | Note 9: junction to solder point at pin 1 (VCC) or pin 7 (GND) | 3 |
| Thermal Resistance, Junction to Case | RθJC | | | 45 | °C/W | Note 10: junction to top of case | 3 |
| Operating Temperature Range | TJ | -40 | | 150 | °C | | 3 |
| Storage Temperature Range | TSTG | -55 | | 150 | °C | | 3 |
| Electrostatic Discharge - Human Body Model | ESD HBM | | | 4000 | V | JEDEC class 3A (JESD22-A114) | 3 |
| Electrostatic Discharge - Machine Model | ESD MM | | | 200 | V | JEDEC class B (JESD22-A115) | 3 |
| Supply Voltage (operating range, from application text) | VCC | 4.5 | | | V | Application Information: controller operates from VCC of 4.5V | 11 |
| Operating Frequency (from features list) | | | | 500 | kHz | Features: operation up to 500kHz | 1 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | Terminals: Finish, Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |
## CAD (KiCad official)
- Symbol: `ZXGD3105N8TC`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `zxgd3105n8tc-etched.step` / `zxgd3105n8tc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `zxgd3105n8tc.step` / `zxgd3105n8tc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Diodes Incorporated datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590222095046111232) (14 pp, sha256 `bf6cfb04d3bc02f0`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/zxgd3105n8tc-datasheet.pdf)