# ZXGD3103N8TC

**Diodes Incorporated** · AC-DC Controllers & Regulators · SO-8

ZXGD3103N8TC from Diodes Incorporated, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DNC | unconnected | Do not connect; leave this pin floating. |
| 2 | REF | passive | This pin is connected to VCC via resistor RREF. |
| 3 | GATEL | output | This pin sinks current ISINK from the synchronous MOSFET gate, with a gate driver peak sink current rating of 6 A. |
| 4 | GATEH | output | This pin sources current ISOURCE to the synchronous MOSFET gate, with a gate driver peak source current rating of 2.5 A. |
| 5 | Vcc | power_in | This is the supply pin, operating from 5 to 15 V VCC, and should be decoupled closely to ground with a ceramic capacitor. |
| 6 | GND | power_in | This is the ground reference point and must be connected to the synchronous MOSFET source terminal. |
| 7 | BIAS | passive | This pin is connected to VCC via resistor RBIAS. |
| 8 | DRAIN | input | Connect this pin to the synchronous MOSFET drain terminal; the continuous drain pin voltage is rated -3 to 180 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | SO-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Turn-off Threshold Voltage | VT | -16 | -10 | 0 | mV | VG =1V, RH = 100kΩ, RL = o/c | 4 |
| Gate Output Voltage | VG(OFF) |  | 0.73 | 1 | V | VD ≥ 0mV, RH = 100kΩ, RL = o/c | 4 |
| Gate Output Voltage | VG | 6 | 7.2 |  | V | VD = -50mV, RH = o/c, RL = 100kΩ | 4 |
| Gate Output Voltage | VG | 8.8 | 9.2 |  | V | VD = -100mV, RH = o/c, RL = 100kΩ | 4 |
| Gate Output Voltage | VG | 9.2 | 9.4 |  | V | VD ≤ -150mV, RH = o/c, RL = 100kΩ | 4 |
| Gate Output Voltage | VG | 9.3 | 9.5 |  | V | VD ≤ -200mV, RH = o/c, RL = 100kΩ | 4 |
| Supply Voltage | VCC |  |  | 15 | V |  | 3 |
| Continuous Drain Pin Voltage | VD | -3 |  | 180 | V |  | 3 |
| GATEH and GATEL Output Voltage | VG | -3 |  |  | V | Printed maximum is VCC + 3 V | 3 |
| Gate Driver Peak Source Current | ISOURCE |  |  | 2.5 | A |  | 3 |
| Gate Driver Peak Sink Current | ISINK |  |  | 6 | A |  | 3 |
| Reference Current | IREF |  |  | 25 | mA |  | 3 |
| Bias Current | IBIAS |  |  | 100 | mA |  | 3 |
| Electrostatic Discharge - Human Body Model | ESD HBM |  |  | 2000 | V | JEDEC class 2 | 3 |
| Electrostatic Discharge - Machine Model | ESD MM |  |  | 300 | V | JEDEC class B | 3 |
| Supply Voltage Range | VCC | 5 |  | 15 | V | Listed as VCC Range in Features | 1 |
| Operating Temperature Range | TJ | -40 |  | 150 | °C |  | 3 |
| Storage Temperature Range | TSTG | -55 |  | 150 | °C |  | 3 |
| Power Dissipation | PD |  | 490 |  | mW | Note 5: minimum recommended pad layout, FR-4, still air | 3 |
| Power Dissipation | PD |  | 655 |  | mW | Note 6: pins 5 and 6 on 5mm x 5mm 1oz copper heat-sinks | 3 |
| Power Dissipation | PD |  | 720 |  | mW | Note 7: heat-sinks 10mm x 10mm | 3 |
| Power Dissipation | PD |  | 785 |  | mW | Note 8: heat-sinks 15mm x 15mm | 3 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 255 |  | °C/W | Note 5: minimum recommended pad layout, still air | 3 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 191 |  | °C/W | Note 6: pins 5 and 6 on 5mm x 5mm 1oz copper heat-sinks | 3 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 173 |  | °C/W | Note 7: heat-sinks 10mm x 10mm | 3 |
| Thermal Resistance, Junction to Ambient | RθJA |  | 159 |  | °C/W | Note 8: heat-sinks 15mm x 15mm | 3 |
| Thermal Resistance, Junction to Lead | RθJL |  | 135 |  | °C/W | Note 9: junction to solder-point on pins 6 (GND) and 5 (VCC) | 3 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts |  | tin |  Terminals: Finish - Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 | 1 |

## CAD (KiCad official)

- Symbol: `ZXGD3103N8TC`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `zxgd3103n8tc-etched.step` / `zxgd3103n8tc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `zxgd3103n8tc.step` / `zxgd3103n8tc.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Diodes Incorporated datasheet](https://www.diodes.com/assets/Datasheets/ZXGD3103N8TC.pdf) (12 pp, sha256 `01dea005e8878cdc`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/zxgd3103n8tc-datasheet.pdf)