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docs ztp7192y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers ztp7192y: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json ztp7192y: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 19h ago
README.md ztp7192y: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 18d ago
ztp7192y-etched.fit.json ztp7192y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ztp7192y-etched.glb ztp7192y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ztp7192y-etched.step ztp7192y: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
ztp7192y.glb Publish 0.1.0 · Ray 1mo ago
ztp7192y.kicad_mod Publish 0.1.0 · Ray 1mo ago
ztp7192y.kicad_sym Publish 0.1.0 · Ray 1mo ago
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ztp7192y.step Publish 0.1.0 · Ray 1mo ago

ZTP7192Y

ZILLTEK · DC-DC Converters · TSOT-23-6L

ZTP7192Y from ZILLTEK, in a TSOT-23-6L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive High-side gate drive boost input. Connect a 0.1μF or greater capacitor from SW to BOOT to power the high-side N-channel MOSFET switch. Internally charged from the 5V rail when SW is low.
2 GND power_in Ground return for the IC and power stage. Connect to a large copper area for improved thermal performance.
3 FB input Feedback input. Senses the output voltage via an external resistive divider; internal reference is 0.6V. Over-voltage comparator trips when FB exceeds 0.66V (110% of nominal).
4 EN input Enable digital input. Drive high (>1.22V rising) to turn the regulator on; drive low (<1.12V falling) to shut down (typ 3μA quiescent). Pull up with a 100kΩ resistor to VIN for automatic startup.
5 IN power_in Power input. Supplies the IC and the step-down converter switches; operating range 4.7V to 18V (abs max 19V). Bypass to GND with a low-ESR ceramic capacitor placed close to the pin.
6 SW power_out Power switching output node. Connect the external inductor from SW to the output; the bootstrap capacitor also connects between SW and BOOT. Route away from sensitive analog nodes such as FB.

Key specifications

Parameter Value
Manufacturer ZILLTEK
Package TSOT-23-6L
Category PMIC
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • ZTP7192Y

CAD (KiCad official)

  • Symbol: ZTP7192Y
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: TSOT-23-6L (KiCad packages3D, STEP)
  • 3D model files: ztp7192y-etched.step / ztp7192y-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ztp7192y.step / ztp7192y.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZILLTEK datasheet (8 pp, sha256 372038df753bfaf6, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF