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ZSSC3224BI3R

RENESAS · Interface - Specialized · QFN-24-EP(4x4)

ZSSC3224BI3R from RENESAS, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ZMDI-test unconnected Test pin reserved by the manufacturer; do not connect.
2 RES input Active-low ZSSC3224 reset with internal pull-up; a VDD-VSS-VDD transition at this pin causes a complete reset.
3 VDDB power_out Positive external bridge-sensor supply, internally generated with 1.60 V to 1.75 V (typ. 1.68 V) and bridge current limited to 1.8 mA to 16.5 mA for full PSRR.
4 INN input Negative sensor signal input (or sensor ground for absolute voltage-source sensors), with input voltage range 0.65 V to 1.05 V.
5 EOC output End-of-conversion or interrupt output, configurable via the INT_setup MTP setting.
6 MISO output Data output for the SPI interface (max. SPI clock 20 MHz; maximum 40 pF load on MISO at VDD = 1.8 V).
7 ZMDI-test unconnected Test pin reserved by the manufacturer; do not connect.
8 n.c. unconnected Not connected / not bonded; no connection required.
9 n.c. unconnected Not connected / not bonded; no connection required.
10 n.c. unconnected Not connected / not bonded; no connection required.
11 n.c. unconnected Not connected / not bonded; no connection required.
12 SCLK/SCL input Clock input for SPI (SCLK) or I2C (SCL) (I2C clock up to 3.4 MHz).
13 MOSI/SDA bidirectional Data input for SPI (MOSI) or data input/output for I2C (SDA).
14 VSSB power_in Negative external bridge-sensor supply, i.e. sensor ground; the datasheet lists this pin as OUT, it is mapped to power_in as a ground reference.
15 INP input Positive sensor signal input, with input voltage range 0.65 V to 1.05 V.
16 ZMDI-test unconnected Test pin reserved by the manufacturer; do not connect.
17 SS input Slave select for SPI; active low by default (polarity configurable via SS_polarity).
18 ZMDI-test unconnected Test pin reserved by the manufacturer; do not connect.
19 ZMDI-test unconnected Test pin reserved by the manufacturer; do not connect.
20 n.c. unconnected Not connected / not bonded; no connection required.
21 n.c. unconnected Not connected / not bonded; no connection required.
22 VDD power_in Positive supply voltage for the ZSSC3224, recommended range 1.68 V to 3.6 V (Table 3.1); absolute maximum -0.4 V to 3.63 V.
23 n.c. unconnected Not connected / not bonded; no connection required.
24 VSS power_in Ground reference voltage for the ZSSC3224; all voltages are referenced to VSS.
25 Exposed Pad unconnected Exposed thermal pad; do not connect electrically.

Key specifications

Parameter Value
Manufacturer RENESAS
Package QFN-24-EP(4x4)
Category Interface ICs
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
External Sensor Supply Voltage, ADC Reference Voltage VDDB 1.6 1.68 1.75 V Internally generated 10
Current Consumption, Active State average IVDD 1050 1500 µA Active State, average 10
Current Consumption, Sleep Mode idle current IVDD 20 250 nA Sleep Mode, idle current, 85°C 10
Power Supply Rejection PSRVDD 17 60 88 dB VDD = 1.8V 10
Power Supply Rejection PSRVDD 32 65 91 dB VDD = 2V 10
ADC Resolution rADC 12 24 Bit 10
ADC Clock Frequency fADC 0.9 1 1.1 MHz Internal ADC clock 10
Amplifier Gain (64 steps) Gamp 6.6 216 64 steps 10
Gain Error Gerr -2.5 2.5 % Referenced to nominal gain 10
External Sensor Bridge Resistance, full PSRR RBR 1 10 50 kΩ Full power supply disturbance rejection (PSRR) capabilities 10
External Sensor Bridge Resistance, reduced PSRR RBR 100 999 Ω Reduced PSRR, but full functionality 10
Internal Oscillator Frequency fCLK 3.6 4 4.4 MHz 11
Supply Voltage VDD 1.68 3.6 V 9
External (Parasitic) Capacitance between VDDB and VSS CL 0.01 50 nF 9
Operation Temperature Range TAMB -40 85 °C 9
Power-Down Time (duration of VDD Low Level) tSPIKE 3 µs Power-on reset requirement 9
VDD Low Level VDDlow 0 0.2 V Power-on reset requirement 9
VDD Rising Slope SRVDD 10 V/ms Power-on reset requirement 9
Analog Supply Voltage VDD -0.4 3.63 V 8
Voltage at all Analog and Digital IO Pins VA_IO, VD_IO -0.5 V Printed maximum is VDD+0.5 V (expression, not a number) 8
Input Current into Any Pin except RES, ZMDI-test, SS IIN -100 100 mA Input current into any pin except RES, ZMDI-test, SS 8
Electrostatic Discharge Tolerance, Human Body Model VHBM1 -4000 4000 V HBM, C = 100pF, R = 1.5k 8
Storage Temperature TSTOR -50 150 °C 8

CAD (KiCad official)

  • Symbol: ZSSC3224BI3R
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: zssc3224bi3r-etched.step / zssc3224bi3r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zssc3224bi3r.step / zssc3224bi3r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (48 pp, sha256 01ab92ce89761044, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF