# ZSSC3123AA2R

**RENESAS** · Interface - Specialized · TSSOP-14

ZSSC3123AA2R from RENESAS, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCORE | power_in | Core voltage pin that must always be connected to an external capacitor to ground within CVCORE_SM (10-110nF) and CVCORE_UM (90-330nF) limits; it is the only internal module pin (ESD >2000V). |
| 2 | C0 | passive | Capacitor input 0 for the sensor capacitance, with span of 2pF to 260pF full scale. |
| 3 | VSS | power_in | Ground supply; connecting to GND for shielding is strongly recommended. |
| 4 | CC | passive | Common capacitor input for the sensor common node. |
| 5 | VSS | power_in | Ground supply; connecting to GND for shielding is strongly recommended. |
| 6 | C1 | passive | Capacitor input 1 (optional reference or differential capacitor, 2pF to 260pF); must be unconnected if not used. |
| 7 | VDD | power_in | Supply voltage pin, 2.3V to 5.5V for ZSSC3123, must be connected to VSUPPLY with a 100nF to 470nF capacitor to ground. |
| 8 | Alarm_Low/PDM_T | output | Low alarm output or temperature PDM output depending on output selection (Table 20); must be unconnected if not used. |
| 9 | Alarm_High | output | High alarm output; must be unconnected if not used. |
| 10 | Ready/PDM_C | output | Ready signal (conversion complete output) or capacitance PDM output depending on output selection (Table 20); must be unconnected if not used. |
| 11 | VSS | power_in | Ground supply; must connect to GND. |
| 12 | SDA/MISO | bidirectional | I2C data in I2C mode or Master-In-Slave-Out in SPI mode (Table 20); must connect to VDD if not used. |
| 13 | SCL/SCLK | input | I2C clock in I2C mode or serial clock in SPI mode (Table 20); must connect to VDD if not used. |
| 14 | SS | input | Slave Select input in SPI mode (Table 20); must be unconnected if not used. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | TSSOP-14 |
| Category | Interface ICs |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Analog Supply Voltage | VDD | -0.3 |  | 6 | V |  | 8 |
| Voltages at Analog I/O, In Pin | VINA | -0.3 |  |  | V | max VDD+0.3 | 8 |
| Voltages at Analog I/O, Out Pin | VOUTA | -0.3 |  |  | V | max VDD+0.3 | 8 |
| Storage Temperature Range | TSTOR | -55 |  | 150 | °C |  | 8 |
| Supply Voltage to Ground | VSUPPLY | 2.3 |  | 5.5 | V |  | 9 |
| Ambient Temperature Range | TAMB | -40 |  | 125 | C |  | 9 |
| Output Pads/Pins Drive Strength | IOUT | 1.5 |  | 20 | mA |  | 9 |
| External Capacitance between VDD pin and Ground | CVSUPPLY | 100 | 220 | 470 | nF |  | 9 |
| External Capacitance between Vcore and Ground, Sleep Mode | CVCORE_SM | 10 |  | 110 | nF |  | 9 |
| External Capacitance between Vcore and Ground, Update Mode | CVCORE_UM | 90 |  | 330 | nF |  | 9 |
| Input Capacitance Span (Full Scale Values) | C0 | 2 |  | 260 | pF |  | 9 |
| External Reference Capacitance | C1 | 2 |  | 260 | pF |  | 9 |
| External Isolating Capacitance (Mult1) | CCC |  |  | 16 | pF | CC pin to sensor common node | 9 |
| I2C Pull-up Resistor | RPU | 1 | 2.2 |  | k |  | 9 |
| SDA/MISO Load Capacitance | CSDA |  |  | 200 | pF |  | 9 |
| Update Mode Current, best case | IDD |  | 60 | 100 | μA | Best case settings: Mult 1, 8-bit, 125ms Power Down | 10 |
| Update Mode Current, worst case | IDD |  | 750 | 1100 | μA | Worst case settings: Mult 1, 14-bit, 0ms Power Down | 10 |
| Sleep Mode Current | ISLEEP |  | 0.6 | 1 | μA | -40 to 85°C | 10 |
| Sleep Mode Current | ISLEEP |  | 1 | 3 | μA | -40 to 125°C | 10 |
| Power-On-Reset Level | VPOR | 1.6 | 1.7 | 2.2 | V |  | 10 |
| Active Regulated Voltage | VREG | 2.4 | 2.55 | 2.7 | V | measured on the Vcore pin | 10 |
| CDC Resolution | RESCDC | 8 |  | 14 | Bits |  | 10 |
| Integral Nonlinearity | INLCDC |  |  | 0.2 | % | Mult 1, 10% to 90% input, 14-bit | 10 |
| Differential Nonlinearity | DNLCDC |  |  | 0.9 | LSB | Mult 1, 10% to 90% input, 14-bit | 10 |
| Temperature Resolution 8-bit | RESTEMP | 0.64 | 0.96 | 1.6 | °C | -40 to 125°C, 8-bit mode | 10 |
| Temperature Resolution 14-bit | RESTEMP | 0.01 | 0.015 | 0.025 | °C | -40 to 125°C, 14-bit mode | 10 |
| Temperature Nonlinearity First Order Fit | INLCDC |  | 0.5 | 1 | °C | -40 to 125°C | 10 |
| Temperature Nonlinearity Second Order Fit | INLCDC |  | 0.2 | 0.4 | °C | -40 to 125°C | 10 |
| Temperature Voltage Dependency | PSRTEMP |  | 0.03 | 0.1 | °C/V | VSUPPLY > VREG+0.25V | 10 |
| Temperature Voltage Dependency | PSRTEMP |  | 1.25 | 2.25 | °C/V | 2.3V ≤ VSUPPLY ≤ VREG + 0.25V | 10 |
| PDM Output Range | VPDM_Range | 10 |  | 90 | %VSUPPLY |  | 11 |
| PDM Additional Error | EPDM |  | 0.1 | 0.5 | % | -40 to 125C | 11 |
| Filter Settling Time | tSETT |  | 9.2 |  | ms | 0% to 90% LP filter 10k/400nF | 11 |
| Ripple | VRIPP |  | 1 |  | mV/V | 0% to 90% LP filter 10k/400nF | 11 |
| Voltage Output Level Low | VOL | 0 |  | 0.2 | VSUPPLY |  | 11 |
| Voltage Output Level High | VOH | 0.8 |  | 1 | VSUPPLY |  | 11 |
| Voltage Input Level Low | VIL | 0 |  | 0.2 | VSUPPLY |  | 11 |
| Voltage Input Level High | VIH | 0.8 |  | 1 | VSUPPLY |  | 11 |
| Communication Pin Input Capacitance | CIN |  |  | 10 | pF |  | 11 |
| Capacitive Tolerance Between Parts | Ctol | -10 |  | 10 | % | All capacitive values in the specification are subject to this variation | 11 |
| Trimmed System Frequency | fSYS | 1.76 | 1.85 | 1.94 | MHz | All timing in this specification is subject to this variation. | 11 |
| Frequency Variation Over Voltage and Temperature | fvar | -10 |  | 10 | % | All timing in this specification is subject to this variation. | 11 |
| Start-Up-Time | tSTA | 4.25 |  | 173 | ms | Power-on (POR) to data ready, fastest and slowest settings | 11 |
| Update Rate (Update Mode) | tRESP_UP | 0.7 |  | 288 | ms | Fastest and slowest settings | 11 |
| Response Time (Sleep Mode) | tRESP_SL | 1.25 |  | 163 | ms | Fastest and slowest settings | 11 |
| Peak-to-Peak Noise @ output | NOUT |  | 5 | 20 | LSB | Mult 1, 2, 4, 8 (100 measurements in 14 bit) | 11 |
| Error Mult 1 | AEout | -0.75 | 0.25 | 0.75 | %FSO | Mult 1, -40 to 125°C, 3V±10%, 3.3V±10%, 5V±10% | 12 |
| Error Mult 1 | AEout | -1.25 | 0.5 | 1.25 | %FSO | Mult 1, -40 to 125°C, 2.5V±10% | 12 |
| Error Mult 2, 4, 8 | AEout | -1.25 | 0.5 | 1.25 | %FSO | Mult 2, 4, 8, -40 to 125°C, 3V±10%, 3.3V±10%, 5V±10% | 12 |
| Error Mult 2, 4, 8 | AEout | -3 | 1.5 | 3 | %FSO | Mult 2, 4, 8, -40 to 125°C, 2.5V±10% | 12 |
| Data Retention | tWRI_EEP | 10 |  |  | Year | At 100C | 10 |
| Soldering Peak Temperature | Tpeak |  |  | 260 | C | Less than 30s (IPC/JEDEC-STD-020 Standard) | 61 |

## CAD (KiCad official)

- Symbol: `ZSSC3123AA2R`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `zssc3123aa2r-etched.step` / `zssc3123aa2r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `zssc3123aa2r.step` / `zssc3123aa2r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/zssc3123aa2r-datasheet.pdf) (67 pp, sha256 `f1ba93e00f2e5f96`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/zssc3123aa2r-datasheet.pdf)