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ZJC2542-16BSDBR

Public Made by Adom

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ZJW Digital To Analog Converters (DACs), SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ZJC2542-16BSDBR

ZJW · Digital To Analog Converters (DACs) · SOIC-14

ZJC2542-16BSDBR from ZJW, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RFB input Feedback resistor input pin, which connects to the external amplifier output for bipolar mode.
2 VOUT output DAC un-buffered voltage output with a typical output resistance of 6.25 kΩ.
3 AGNDF power_in Analog ground force pin.
4 AGNDS power_in Analog ground sense pin.
5 REFS output Voltage reference sense output.
6 REFF input Voltage reference force input.
7 CS input Serial digital chip select input, active at low.
8 SCLK input Serial data clock input.
9 NC unconnected No connection.
10 DIN input Serial digital signal input.
11 LDAC input When this input is taken low, the DAC register is simultaneously updated with the contents of the input register.
12 DGND power_in Digital ground.
13 INV output Connected to the middle point of the internal scaling resistors; connect to the external op amp inverting input in bipolar mode.
14 VDD power_in Supply voltage input; the device operates from a 2.7 V to 5.5 V single supply.

Key specifications

Parameter Value
Manufacturer ZJW
Package SOIC-14
Category ADC/DAC/Data Conversion
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Integral Nonlinear Error (16-bit) INL -1 0.5 1 LSB 16 bits; ● full temperature range 9
Differential Nonlinear Error (16-bit) DNL -0.75 0.25 0.75 LSB 16 bits; ● full temperature range 9
Gain Error (16-bit) GE -0.75 0.3 0.75 LSB 16 bits; TA=25 °C 9
Gain Error (16-bit) GE -1 0.5 1 LSB 16 bits; -40 °C≤TA≤+85 °C 9
Gain Error (16-bit) GE -1.5 0.5 1.5 LSB 16 bits; -40 °C≤TA≤+125 °C; ● 9
Gain Error Temperature Drift -0.05 0.05 ppm/°C 9
Zero Code Error (16-bit) ZCE -1 0.25 1 LSB 16 bits; ● full temperature range 9
Zero Code Error Temperature Coefficient -0.1 0.1 ppm/°C 9
Bipolar Zero Code Error (16-bit) -4 1 4 LSB 16-bit; ● full temperature range 9
Bipolar Zero Code Error Drift -0.1 0.1 ppm/°C 10
Output Voltage Range, Unipolar 0 V Unipolar; ● 10
DAC Reference Input Voltage Range 2 V ● 10
DAC Output Impedance tolerance (general) -20 20 % General tolerance 10
Power Supply Rejection Ratio ΔVDD -0.5 0.5 LSB ΔVDD ±10% 10
Digital Input Current -1 1 µA ● 10
Power Supply VDD 2.7 5.5 V ● 11
Digital Interface Power VLOGIC 1.8 5.5 V 11
Rated Performance Temperature Range TMIN to TMAX -40 125 °C 11
SCLK Frequency fSCLK 14 MHz 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK Frequency fSCLK 50 MHz 2.7 V≤VLOGIC≤5.5 V; ● 12
SCLK Period t1 70 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK Period t1 20 ns 2.7 V≤VLOGIC≤5.5 V; ● 12
SCLK High Level Time t2 35 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK High Level Time t2 9 ns 2.7 V≤VLOGIC≤5.5 V; ● 12
SCLK Low Level Time t3 35 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK Low Level Time t3 9 ns 2.7 V≤VLOGIC≤5.5 V; ● 12
CS Low To SCLK High Setup Time t4 5 ns 1.8 V≤VLOGIC<2.7 V; ● 12
CS High To SCLK High Setup Time t5 50 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK High To CS Low Hold Time t6 5 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK High To CS High Hold Time t7 10 ns 1.8 V≤VLOGIC<2.7 V; ● 12
SCLK High To CS High Hold Time t7 5 ns 2.7 V≤VLOGIC≤5.5 V; ● 12
Data Creation Time t8 35 ns 1.8 V≤VLOGIC<2.7 V; ● 12
Data Creation Time t8 10 ns 2.7 V≤VLOGIC≤5.5 V; ● 12
Data Hold Time t9 5 ns 1.8 V≤VLOGIC<2.7 V; ●; VINH=90% of VDD, VINL=10% of VDD 12
CS High Time Between Low Levels t10 15 ns 1.8 V≤VLOGIC<2.7 V; ● 12
LDAC Low Pulse Width t11 20 ns 1.8 V≤VLOGIC<2.7 V; ● 12
CS High To LDAC Low Settling Time t12 10 ns 1.8 V≤VLOGIC<2.7 V; ● 12
LDAC Low To SCLK High Setup Time t13 60 ns 1.8 V≤VLOGIC<2.7 V; ● 12
VDD to AGND -0.3 6 V 8
REF to AGND -0.3 V 8
Digital Input to DGND -0.3 V 8
Input current to pins except VDD -10 10 mA 8
Storage Temperature Range -65 150 °C 8
Junction Temperature Range 150 °C 8
Lead Temperature (Soldering) 300 °C Soldering, 10 seconds 8
Maximum Reflow Temperature 260 °C 8
Electrostatic Discharge, Human Body Model (HBM) 3.5 kV HBM 8
Electrostatic Discharge, Charged Device Model (CDM) 2 kV CDM 8
Thermal Resistance, junction-to-ambient (SOIC-14) θJA 106.7 °C/W SOIC-14 8
Thermal Resistance, junction-to-case (SOIC-14) θJC 54.2 °C/W SOIC-14 8

CAD (KiCad official)

  • Symbol: ZJC2542-16BSDBR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: zjc2542-16bsdbr-etched.step / zjc2542-16bsdbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zjc2542-16bsdbr.step / zjc2542-16bsdbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZJW datasheet (30 pp, sha256 57c444aa1bdf9373, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF