ZJA3677BSDBT from ZJW, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connect; this pin is not internally connected.
2	-INA	input	Channel A inverting input, protected to ±65 V relative to -VS with power on or off.
3	+INA	input	Channel A non-inverting input, protected to ±65 V relative to -VS with power on or off.
4	-VS	power_in	Negative power supply (single supply 2.7 V to 36 V total, or dual ±1.35 V to ±18 V).
5	+INB	input	Channel B non-inverting input, protected to ±65 V relative to -VS with power on or off.
6	-INB	input	Channel B inverting input, protected to ±65 V relative to -VS with power on or off.
7	NC	unconnected	No connect; this pin is not internally connected.
8	REFB	input	Channel B reference voltage input.
9	OUTB	output	Channel B output.
10	SENSEB	input	Channel B sense terminal.
11	+VS	power_in	Positive power supply (single supply 2.7 V to 36 V total, or dual ±1.35 V to ±18 V).
12	SENSEA	input	Channel A sense terminal.
13	OUTA	output	Channel A output.
14	REFA	input	Channel A reference voltage input.

Key specifications

Parameter	Value
Manufacturer	ZJW
Package	SOIC-14
Category	Operational Amplifier/Comparator
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
System Offset, B Grade	VOS		15	100	µV	B Grade	7
System Offset, B Grade, -40 °C to 85 °C	VOS			200	µV	B Grade, -40 °C to 85 °C	7
System Offset, B Grade, full temperature	VOS			300	µV	B Grade ●	7
System Offset Drift, B Grade, -40 °C to 85 °C	TCVOS		0.5	2	µV/°C	B Grade, -40 °C to 85 °C	7
System Offset Drift, B Grade, full temperature	TCVOS			3	µV/°C	B Grade ●	7
Power Supply Rejection Ratio	PSRR		0.1	0.6	µV/V	VS = ±2.25 V to ±18 V	7
Power Supply Rejection Ratio, full temperature	PSRR			1.1	µV/V	VS = ±2.25 V to ±18 V ●	7
Common Mode Rejection Ratio	CMRR	104	124		dB	VS = ±15 V, VCM = ±10 V, RS = 0Ω	7
Common Mode Rejection Ratio, full temperature	CMRR	96			dB	●	7
Common Mode Rejection Ratio Drift			0.03	0.2	ppm/°C	●	7
Gain Error			0.0002	0.0015	%		7
Gain Error, full temperature				0.003	%	●	7
Gain Drift			0.04	0.3	ppm/°C	●	7
Supply Current			330	360	µA		7
Supply Current, full temperature				370	µA	●	7
Operating Voltage Range		-1.35		18	V	Dual supply, ±1.35 to ±18	7
Specified Temperature Range		-40		125	°C		7
Differential Mode Input Impedance	RIN		80		kΩ	Differential Mode	7
Common Mode Input Impedance	RIN		40		kΩ	Common Mode	7
Bandwidth			500		kHz		7
Slew Rate			1		V/µs		7
Settling Time to 0.01 %	tS		18		µs	CL = 100 pF, 0 to 10 V step, to 0.01 %	7
Settling Time to 0.001 %	tS		20		µs	CL= 100 pF, 0 to 10 V step, to 0.001 %	7
Channel Separation			140		dB	f = 1 kHz	7
Gain Nonlinearity			5		ppm	VOUT = 20 VP-P	7
Short-Circuit Current, Source	ISC		28		mA	Source	7
Short-Circuit Current, Sink	ISC		-15		mA	Sink	7
Capacitive Load Drive			200		pF		7
Voltage Noise	en,p-p		2.5		µVP-P	f = 0.1 Hz to 10 Hz	7
Voltage Noise Density	en		65		nV/√Hz	f = 1 kHz	7
Supply Voltage				40	V		6
Maximum Voltage at Any Input Pin				65	V	relative to (-VS), i.e. (-VS) + 65 V	6
Minimum Voltage at Any Input Pin		-65			V	relative to (-VS), i.e. (-VS) - 65 V	6
Operating Temperature Range		-40		125	°C		6
Storage Temperature Range		-65		150	°C		6
Junction Temperature Range		-65		150	°C		6
Maximum Reflow Temperature				260	°C	IPC/JEDEC J-STD-020	6
Lead Temperature, Soldering				300	°C	10 sec	6
ESD Human Body Model	HBM			3.5	kV	ANSI/ESDA/JEDEC JS-001	6
ESD Charged Device Model	CDM			2	kV	ANSI/ESDA/JEDEC JS-002	6
Thermal Resistance Junction-to-Ambient, SOIC-14	θJA		120		°C/W	SOIC-14	6
Thermal Resistance Junction-to-Case, SOIC-14	θJC		36		°C/W	SOIC-14	6

CAD (KiCad official)

Symbol: ZJA3677BSDBT
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: zja3677bsdbt-etched.step / zja3677bsdbt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zja3677bsdbt.step / zja3677bsdbt.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: ZJW datasheet (28 pp, sha256 874eedc45b74fe6d, retrieved 2026-10-30, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ZJA3677BSDBT

Verified ZJA3677BSDBT

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README