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ZJA3669ASABR

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ZJW Differential Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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ZJA3669ASABR

ZJW · Differential Amplifiers · SOIC-8

ZJA3669ASABR from ZJW, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF- input Reference input; ground for unity gain and connect to the same low-impedance ground plane as REF+, since series resistance degrades CMRR.
2 -IN input Inverting analog input with common-mode range of ±270 V and maximum differential range of ±14.7 V.
3 +IN input Non-inverting analog input with common-mode range of ±270 V and maximum differential range of ±14.7 V.
4 V- power_in Negative power supply; supply voltage VS from ±2.25 V to ±18 V is applied between pin 7 and pin 4, decoupled with 0.1 µF.
5 REF+ input Reference input; ground for unity gain and connect to the same low-impedance ground plane as REF-, or drive from a low-impedance reference in single-supply use.
6 OUT output Analog output with rail-to-rail swing, 50 mA source and 90 mA sink short-circuit current, and drives up to 10 nF capacitive load.
7 V+ power_in Positive power supply; supply voltage VS from ±2.25 V to ±18 V is applied between pin 7 and pin 4, decoupled with 0.1 µF.
8 NC unconnected No internal connection; should be left open.

Key specifications

Parameter Value
Manufacturer ZJW
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gain Error GE 0.002 0.01 %FSR VOUT = ± 10 V 6
Gain vs Temperature ΔG/ΔT 1 3 ppm/° C VOUT = ± 10 V, over temperature 6
Nonlinearity GN 0.0005 0.001 %FSR VOUT = -10 V to +10 V 6
Initial Offset Voltage VOS 200 750 µV 6
Offset Voltage vs Temperature ΔVOS/ΔT 3 15 µV/° C over temperature 6
Power Supply Rejection Ratio PSRR 90 120 dB VS = ± 2.25 V to ± 18 V 6
Input Voltage Range, Differential IVR -14.7 14.7 V Differential 6
Input Voltage Range, Common-mode IVR -270 270 V Common-mode 6
CMRR at dc CMRR 90 100 dB At dc, VCM = ± 250 V 6
CMRR at dc over temperature CMRR 84 dB At dc, VCM = ± 250 V, over temperature 6
CMRR at ac 500 Hz CMRR 90 dB At ac, 500 Hz, VCM = 500 VP-P 6
CMRR at ac 1 kHz CMRR 90 dB At ac, 1 kHz, VCM = 500 VP-P 6
Output Voltage Range -14.7 14.7 V 6
Output Voltage Range over temperature -14.5 V over temperature; datasheet prints -14.5 -14.5 6
Quiescent Current ISY 0.9 1 mA VS = ± 18 V, VOUT = 0 V 6
Quiescent Current over temperature ISY 1.2 mA VS = ± 18 V, VOUT = 0 V, over temperature 6
Supply Voltage Range -2.25 18 V printed ± 2.25 to ±18 6
Specified Temperature Range -40 125 °C 6
Initial Gain G 1 V/V VOUT = ± 10 V 6
Differential Input Impedance RIN 800 kΩ Differential 6
Common-mode Input Impedance RIN 200 kΩ Common-mode 6
Short-Circuit Current Source ISC 50 mA Source 6
Short-Circuit Current Sink ISC 90 mA Sink 6
Capacitive Load Drive 10 nF No sustained oscillations 6
Output Noise Voltage 20 µVP-P 0.01 Hz to 10 Hz 6
Output Noise Density 550 nV/√Hz 1 kHz 6
Small-signal Bandwidth BW 450 kHz 6
Slew Rate SR 1.8 V/µs VOUT = ± 10 V step 6
Full-power Bandwidth 28 kHz VOUT = 20 VP-P 6
Settling Time tS 18 µs 0.01%, VOUT = 10 V step 6
Supply Voltage 40 V 5
Input Voltage -300 300 V 5
Common-mode and Differential Input Voltage, 10s -500 500 V 10s 5
Input Current on Any Input Pin 10 mA 5
Storage Temperature Range -65 150 °C 5
Maximum Reflow Temperature 260 °C IPC/JEDEC J-STD-020 5
Lead Temperature, Soldering 300 °C 10 sec 5
ESD Human Body Model 2.5 kV HBM 5
ESD Charged Device Model 2 kV CDM 5
Thermal Resistance Junction-to-Ambient θJA 158 °C/W SOIC-8 5
Thermal Resistance Junction-to-Case θJC 43 °C/W SOIC-8 5

CAD (KiCad official)

  • Symbol: ZJA3669ASABR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: zja3669asabr-etched.step / zja3669asabr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zja3669asabr.step / zja3669asabr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZJW datasheet (25 pp, sha256 cb23bea88601df45, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF