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ZJA3620ASAET
Public Made by Adomby adom
ZJW Instrumentation Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownZJA3620ASAET
ZJW · Instrumentation Amplifiers · SOIC-8
ZJA3620ASAET from ZJW, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RG | passive | Gain setting pin; place the gain resistor between pin 1 and pin 8 (G = 1 + 49.4 kΩ/RG, gain range 1 to 10,000). |
| 2 | -IN | input | Inverting analog input. |
| 3 | +IN | input | Non-inverting analog input. |
| 4 | -VS | power_in | Negative power supply (supply range ±2.3 V to ±18 V). |
| 5 | REF | input | Reference input that sets the zero-output voltage; must be driven by a low impedance source and should not exceed either supply by more than 2 V. |
| 6 | OUT | output | Analog output. |
| 7 | +VS | power_in | Positive power supply (supply range ±2.3 V to ±18 V). |
| 8 | RG | passive | Gain setting pin; place the gain resistor between pin 1 and pin 8 (G = 1 + 49.4 kΩ/RG, gain range 1 to 10,000). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ZJW |
| Package | SOIC-8 |
| Category | Amplifiers/Comparators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gain Error G=1 | GE | -0.1 | 0.1 | % | VOUT = ±10 V, G = 1 | 6 | |
| Gain Error G=10 | GE | -0.3 | 0.3 | % | VOUT = ±10 V, G = 10 | 6 | |
| Gain Error G=100 | GE | -0.3 | 0.3 | % | VOUT = ±10 V, G = 100 | 6 | |
| Gain Error G=1000 | GE | -0.7 | 0.7 | % | VOUT = ±10 V, G = 1,000 | 6 | |
| Input Offset Voltage | VOSI | -125 | 125 | µV | VS = ±4.5 V to ±16.5 V | 6 | |
| Output Offset Voltage | VOSO | -1000 | 200 | 1000 | µV | VS = ±4.5 V to ±16.5 V | 6 |
| Input Offset Current | IOS | -1 | 1 | nA | VS = ±16.5 V | 6 | |
| Input Bias Current | IB | 0.5 | 2 | nA | VS = ±16.5 V | 6 | |
| Gain Nonlinearity RL=10k | 10 | 50 | ppm | G = 1-100, VOUT = -10 V to +10 V, RL = 10 kΩ | 6 | ||
| Gain Nonlinearity RL=2k | 10 | 95 | ppm | G = 1-100, VOUT = -10 V to +10 V, RL = 2 kΩ | 6 | ||
| Gain vs Temperature G>1 | 50 | ppm/° C | G > 1 | 6 | |||
| Gain vs Temperature G=1 | 10 | ppm/° C | G = 1 | 6 | |||
| PSR G=1 | PSR | 80 | 100 | dB | VS = ±2.3 V to ±18 V, G = 1 | 6 | |
| PSR G=10 | PSR | 95 | 120 | dB | VS = ±2.3 V to ±18 V, G = 10 | 6 | |
| PSR G=100 | PSR | 110 | 140 | dB | VS = ±2.3 V to ±18 V, G = 100 | 6 | |
| PSR G=1000 | PSR | 110 | 140 | dB | VS = ±2.3 V to ±18 V, G = 1,000 | 6 | |
| CMRR G=1 | CMRR | 73 | 90 | dB | VS = ±16.5 V, G = 1 | 7 | |
| CMRR G=10 | CMRR | 93 | 110 | dB | VS = ±16.5 V, G = 10 | 7 | |
| CMRR G=100 | CMRR | 110 | 130 | dB | VS = ±16.5 V, G = 100 | 7 | |
| CMRR G=1000 | CMRR | 110 | 130 | dB | VS = ±16.5 V, G = 1,000 | 7 | |
| Input Voltage Noise | eni | 6.5 | 13 | nV/√Hz | f = 1 kHz | 7 | |
| Output Voltage Noise | eno | 70 | 100 | nV/√Hz | f = 1 kHz | 7 | |
| RTI Noise G=100 | 0.2 | 0.4 | µVP-P | 0.1 Hz to 10 Hz, RTI, G = 100 | 7 | ||
| Reference Input Current | IIN | 50 | 60 | µA | VS = ±16.5 V | 7 | |
| Reference Gain to Output | 0.9999 | 1.0001 | 7 | ||||
| Slew Rate | SR | 0.75 | 1.2 | V/µs | 7 | ||
| Quiescent Current | ISY | 1.3 | 1.7 | mA | 7 | ||
| Operating Supply Range | -18 | 18 | V | Operating Range, printed ±2.3 V to ±18 V (min magnitude 2.3) | 7 | ||
| Specified Temperature Range | -40 | 85 | °C | 7 | |||
| Supply Voltage (abs max) | -18 | 18 | V | ±18 V | 5 | ||
| Differential Input Voltage | 25 | V | G = 1 to 10 | 5 | |||
| Storage Temperature | -65 | 150 | °C | 5 | |||
| Lead Temperature, Soldering | 260 | °C | 10 sec | 5 | |||
| Maximum Reflow Temperature | 150 | °C | IPC/JEDEC J-STD-020 Compliant | 5 | |||
| ESD HBM | 1.5 | kV | Human Body Model | 5 | |||
| Thermal Resistance Junction-Ambient | θJA | 130 | °C/W | SOIC-8 | 5 | ||
| Thermal Resistance Junction-Case | θJC | 43 | °C/W | SOIC-8 | 5 | ||
| Average TC of Input Offset Voltage | TCVOSI | 0.1 | µV/° C | VS = ±4.5 V to ±16.5 V | 6 | ||
| Average TC of Output Offset Voltage | TCVOSO | 2.5 | µV/° C | VS = ±4.5 V to ±16.5 V | 6 | ||
| Input Bias Current Average TC | 3 | pA/° C | VS = ±16.5 V | 6 | |||
| Short-Circuit Current | ISC | 20 | mA | 7 |
CAD (KiCad official)
- Symbol:
ZJA3620ASAET - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
zja3620asaet-etched.step/zja3620asaet-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);zja3620asaet.step/zja3620asaet.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ZJW datasheet (26 pp, sha256
7cff6d0aaa50ae8e, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).