# ZGR1018AG1

**Zynalog** · Voltage Reference · SOT-23-3

ZGR1018AG1 from Zynalog, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input supply pin; the datasheet recommends Vin = Vout + Vdrop up to 5.5 V, with an absolute maximum of 6 V (-0.3 V to 6 V), and the minimum input must be at least 2.5 V when Vout is below 2.5 V. |
| 2 | VOUT | power_out | Voltage reference output that supports a recommended load current of -10 mA to 10 mA, with an absolute maximum output voltage of -0.3 V to 5.5 V. |
| 3 | GND | power_in | Ground reference pin for the device. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Zynalog |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply voltage (absolute maximum) | Vin | -0.3 |  | 6 | V |  | 4 |
| Enable pin voltage (absolute maximum) | VEN | -0.3 |  |  | V |  | 4 |
| Output voltage (absolute maximum) | Vout | -0.3 |  | 5.5 | V |  | 4 |
| Output short-circuit current (absolute maximum) | Isc |  |  | 22 | mA |  | 4 |
| Operating temperature (absolute maximum) | TA | -55 |  | 160 | °C |  | 4 |
| Storage temperature (absolute maximum) | Tstg | -65 |  | 170 | °C |  | 4 |
| Input voltage (recommended) | Vin |  |  | 5.5 | V |  | 4 |
| Enable voltage (recommended) | VEN | 0 |  |  | V |  | 4 |
| Output current (recommended) | Iload | -10 |  | 10 | mA |  | 4 |
| Operating temperature (recommended) | TA | -40 |  | 125 | °C |  | 4 |
| Initial output accuracy | Vout | -0.2 |  | 0.2 | % | TA = 25°C | 5 |
| Output voltage temperature drift | Vout |  |  | 30 | ppm/°C | −40°C ≤ TA ≤ 125°C | 5 |
| Line regulation | ΔVout/ΔVin |  | 4 | 20 | ppm/V | Vout + Vdrop ≤ Vin ≤ 5.5V | 5 |
| Load regulation (0 to 10 mA) | ΔVout/ΔIload |  | 7.5 | 20 | ppm/mA | Iload = 0 to 10mA; Vin = Vout + Vdrop | 5 |
| Load regulation (-10 mA to 0) | ΔVout/ΔIload |  | 2 | 10 | ppm/mA | Iload = −10mA to 0; Vin = Vout + Vdrop | 5 |
| Capacitive load | Cload | 0.1 |  | 100 | µF |  | 5 |
| Quiescent current (operating mode) | Iq |  | 330 | 350 | µA | 工作模式 | 5 |
| Quiescent current (output off mode) | Iq |  | 1.5 | 5 | µA | 关断输出模式 | 5 |
| Enable voltage (operating mode) | VEN | 2 |  |  | V | 工作模式 (EN=1) | 5 |
| Enable voltage (output off mode) | VEN |  |  | 0.3 | V | 关断输出模式 (EN=0) | 5 |
| Dropout voltage (0 mA) | Vdrop |  | 8 | 50 | mV | Iload = 0mA | 5 |
| Dropout voltage (10 mA) | Vdrop |  | 310 | 500 | mV | Iload = 10mA | 5 |
| Output short-circuit current | Isc |  | 22 | 25 | mA | VOUT 接地 | 5 |
| Thermal resistance, junction-to-ambient | RΘJA |  | 185 |  | °C/W |  | 4 |
| Thermal resistance, junction-to-case (top) | RΘJC(top) |  | 156 |  | °C/W |  | 4 |
| Thermal resistance, junction-to-board | RΘJB |  | 29.6 |  | °C/W |  | 4 |
| Junction-to-top characterization parameter | ψJT |  | 33.8 |  | °C/W |  | 4 |
| Junction-to-board characterization parameter | ψJB |  | 29.1 |  | °C/W |  | 4 |
| Enable startup time (Cload = 10 µF) | ton |  | 2.5 |  | mS | EN 使能启动 0.1% settling, Cload = 10μF | 5 |
| Enable startup time (Cload = 1 µF) | ton |  | 240 |  | µS | EN 使能启动 0.1% settling, Cload = 1μF | 5 |
| Power-up startup time (Vin = 3 V) | ton |  | 250 |  | µS | 上电启动 0.1% settling, Cload = 1μF; Vin = 3V | 5 |
| Power-up startup time (Vin = 5 V) | ton |  | 200 |  | µS | 上电启动 0.1% settling, Cload = 1μF; Vin = 5V | 5 |
| Low-frequency noise (p-p) | en(p-p) |  | 15 |  | μVpp/V | f = 0.1Hz to 10Hz | 5 |
| Broadband noise | en |  | 45 |  | μVrms | f = 10Hz to 10KHz | 5 |

## CAD (KiCad official)

- Symbol: `ZGR1018AG1`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `zgr1018ag1-etched.step` / `zgr1018ag1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `zgr1018ag1.step` / `zgr1018ag1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Zynalog datasheet](docs/zgr1018ag1-datasheet.pdf) (13 pp, sha256 `0a00b15e0877f76d`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/zgr1018ag1-datasheet.pdf)