ZGAD125D14

{
  "schema_version": 1,
  "type": "component",
  "slug": "zgad125d14",
  "title": "ZGAD125D14",
  "brief": "Zynalog Analog To Digital Converters (ADCs), QFN-64(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "adc-dac-data conversion",
    "zgad125d14",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "ZGAD125D14",
    "manufacturer": "Zynalog",
    "package": "QFN-64(9x9)",
    "pin_count": 65,
    "category": "ADC/DAC/Data Conversion",
    "subcategory": "Analog To Digital Converters (ADCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/fe96529dd99c7566717a7f0ebead3159.pdf",
    "parts": {
      "symbol": "zgad125d14.kicad_sym",
      "footprint": "zgad125d14.kicad_mod",
      "model_3d": "zgad125d14-hero.glb",
      "model_3d_plain": "zgad125d14-etched.glb",
      "model_3d_step": "zgad125d14-etched.step",
      "model_3d_step_plain": "zgad125d14.step",
      "lbr": "zgad125d14.lbr"
    },
    "distributor_links": {
      "lcsc": "C20416586"
    },
    "distributor_check": {
      "checked_at": "2026-11-02T17:06:00Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply, bypassed to ground with a 0.1uF ceramic capacitor (pins 1, 2 and 64 may share one capacitor)."
      },
      {
        "number": "2",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply, bypassed to ground with a 0.1uF ceramic capacitor (pins 1, 2 and 64 may share one capacitor)."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground; the exposed pad on the underside must be soldered to the PCB ground."
      },
      {
        "number": "4",
        "name": "VinA+",
        "type": "input",
        "description": "Channel A positive differential analog input; the differential input voltage should stay within 1.5V."
      },
      {
        "number": "5",
        "name": "VinA-",
        "type": "input",
        "description": "Channel A negative differential analog input, driven 180 degrees out of phase with VinA+."
      },
      {
        "number": "6",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "7",
        "name": "SENSE",
        "type": "input",
        "description": "External reference input: tie to VDD for the internal reference (+/-0.75V input range), or to an external reference between 1.2V and 1.3V (+/-0.6*VSENSE input range)."
      },
      {
        "number": "8",
        "name": "VREF",
        "type": "power_in",
        "description": "Reference voltage output, nominally 1.25V, bypassed to ground with a 2.2uF ceramic capacitor."
      },
      {
        "number": "9",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "10",
        "name": "VCM",
        "type": "output",
        "description": "Common-mode bias output, nominally 0.435*VDD, used to set the analog input common mode and bypassed to ground with a 0.1uF ceramic capacitor."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "12",
        "name": "VinB-",
        "type": "input",
        "description": "Channel B negative differential analog input, driven 180 degrees out of phase with VinB+."
      },
      {
        "number": "13",
        "name": "VinB+",
        "type": "input",
        "description": "Channel B positive differential analog input; the differential input voltage should stay within 1.5V."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "15",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply; pins 15, 16 and 17 may share one bypass capacitor."
      },
      {
        "number": "16",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply; pins 15, 16 and 17 may share one bypass capacitor."
      },
      {
        "number": "17",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply; pins 15, 16 and 17 may share one bypass capacitor."
      },
      {
        "number": "18",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "19",
        "name": "CLK+",
        "type": "input",
        "description": "Differential clock input; conversion starts on the rising edge of CLK+."
      },
      {
        "number": "20",
        "name": "CLK-",
        "type": "input",
        "description": "Differential clock input; conversion starts on the falling edge of CLK+ (complement input)."
      },
      {
        "number": "21",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "22",
        "name": "OF-",
        "type": "output",
        "description": "Overflow/underflow digital output, multiplexed for channels A and B; OF+ is high when an overflow or underflow occurs."
      },
      {
        "number": "23",
        "name": "OF+",
        "type": "output",
        "description": "Overflow/underflow digital output, multiplexed for channels A and B; OF+ is high when an overflow or underflow occurs."
      },
      {
        "number": "24",
        "name": "DB0_1-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D0 while CLKOUT+ is low and D1 while CLKOUT+ is high."
      },
      {
        "number": "25",
        "name": "DB0_1+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D0 while CLKOUT+ is low and D1 while CLKOUT+ is high."
      },
      {
        "number": "26",
        "name": "DB2_3-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D2 while CLKOUT+ is low and D3 while CLKOUT+ is high."
      },
      {
        "number": "27",
        "name": "DB2_3+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D2 while CLKOUT+ is low and D3 while CLKOUT+ is high."
      },
      {
        "number": "28",
        "name": "DB4_5-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D4 while CLKOUT+ is low and D5 while CLKOUT+ is high."
      },
      {
        "number": "29",
        "name": "DB4_5+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D4 while CLKOUT+ is low and D5 while CLKOUT+ is high."
      },
      {
        "number": "30",
        "name": "DB6_7-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D6 while CLKOUT+ is low and D7 while CLKOUT+ is high."
      },
      {
        "number": "31",
        "name": "DB6_7+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D6 while CLKOUT+ is low and D7 while CLKOUT+ is high."
      },
      {
        "number": "32",
        "name": "DVDD",
        "type": "power_in",
        "description": "1.8V supply for the digital output drivers; each pin is bypassed to ground with a separate 0.1uF ceramic capacitor."
      },
      {
        "number": "33",
        "name": "DGND",
        "type": "power_in",
        "description": "Ground for the digital output drivers."
      },
      {
        "number": "34",
        "name": "DB8_9-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D8 while CLKOUT+ is low and D9 while CLKOUT+ is high."
      },
      {
        "number": "35",
        "name": "DB8_9+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D8 while CLKOUT+ is low and D9 while CLKOUT+ is high."
      },
      {
        "number": "36",
        "name": "DB10_11-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D10 while CLKOUT+ is low and D11 while CLKOUT+ is high."
      },
      {
        "number": "37",
        "name": "DB10_11+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D10 while CLKOUT+ is low and D11 while CLKOUT+ is high."
      },
      {
        "number": "38",
        "name": "DB12_13-",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D12 while CLKOUT+ is low and D13 while CLKOUT+ is high."
      },
      {
        "number": "39",
        "name": "DB12_13+",
        "type": "output",
        "description": "Channel B DDR LVDS output carrying D12 while CLKOUT+ is low and D13 while CLKOUT+ is high."
      },
      {
        "number": "40",
        "name": "CLKOUT-",
        "type": "output",
        "description": "LVDS data output clock; the data normally transitions on the edges of CLKOUT+, and CLKOUT+ can be phase-shifted by programming the mode register."
      },
      {
        "number": "41",
        "name": "CLKOUT+",
        "type": "output",
        "description": "LVDS data output clock; the data normally transitions on the edges of CLKOUT+, and CLKOUT+ can be phase-shifted by programming the mode register."
      },
      {
        "number": "42",
        "name": "DA0_1-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D0 while CLKOUT+ is low and D1 while CLKOUT+ is high."
      },
      {
        "number": "43",
        "name": "DA0_1+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D0 while CLKOUT+ is low and D1 while CLKOUT+ is high."
      },
      {
        "number": "44",
        "name": "DA2_3-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D2 while CLKOUT+ is low and D3 while CLKOUT+ is high."
      },
      {
        "number": "45",
        "name": "DA2_3+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D2 while CLKOUT+ is low and D3 while CLKOUT+ is high."
      },
      {
        "number": "46",
        "name": "DA4_5-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D4 while CLKOUT+ is low and D5 while CLKOUT+ is high."
      },
      {
        "number": "47",
        "name": "DA4_5+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D4 while CLKOUT+ is low and D5 while CLKOUT+ is high."
      },
      {
        "number": "48",
        "name": "DGND",
        "type": "power_in",
        "description": "Ground for the digital output drivers."
      },
      {
        "number": "49",
        "name": "DVDD",
        "type": "power_in",
        "description": "1.8V supply for the digital output drivers; each pin is bypassed to ground with a separate 0.1uF ceramic capacitor."
      },
      {
        "number": "50",
        "name": "DA6_7-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D6 while CLKOUT+ is low and D7 while CLKOUT+ is high."
      },
      {
        "number": "51",
        "name": "DA6_7+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D6 while CLKOUT+ is low and D7 while CLKOUT+ is high."
      },
      {
        "number": "52",
        "name": "DA8_9-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D8 while CLKOUT+ is low and D9 while CLKOUT+ is high."
      },
      {
        "number": "53",
        "name": "DA8_9+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D8 while CLKOUT+ is low and D9 while CLKOUT+ is high."
      },
      {
        "number": "54",
        "name": "DA10_11-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D10 while CLKOUT+ is low and D11 while CLKOUT+ is high."
      },
      {
        "number": "55",
        "name": "DA10_11+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D10 while CLKOUT+ is low and D11 while CLKOUT+ is high."
      },
      {
        "number": "56",
        "name": "DA12_13-",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D12 while CLKOUT+ is low and D13 while CLKOUT+ is high."
      },
      {
        "number": "57",
        "name": "DA12_13+",
        "type": "output",
        "description": "Channel A DDR LVDS output carrying D12 while CLKOUT+ is low and D13 while CLKOUT+ is high."
      },
      {
        "number": "58",
        "name": "GND",
        "type": "power_in",
        "description": "Power ground."
      },
      {
        "number": "59",
        "name": "SPI_MISO",
        "type": "output",
        "description": "SPI data readback output in serial mode; it is open-drain and needs a 2K pull-up to the 1.8V to 3.3V SPI supply when read back, and has no function in parallel mode."
      },
      {
        "number": "60",
        "name": "SPI_MOSI",
        "type": "input",
        "description": "SPI data input in serial mode (MODE=0); in parallel mode it selects LVDS drive current, 0 (GND) for 3.5mA and 1 for 1.75mA with 1.8V to 3.3V logic."
      },
      {
        "number": "61",
        "name": "SPI_SCLK",
        "type": "input",
        "description": "SPI clock in serial mode (MODE=0); in parallel mode a logic 1 (1.8V to 3.3V) puts the device into sleep (AC power down) mode."
      },
      {
        "number": "62",
        "name": "SPI_CS",
        "type": "input",
        "description": "SPI chip select in serial mode (MODE=0); in parallel mode a logic 1 (1.8V to 3.3V) enables the clock duty cycle stabilizer."
      },
      {
        "number": "63",
        "name": "MODE",
        "type": "input",
        "description": "Serial/parallel mode select: connect directly to GND for SPI mode or to VDD for parallel GPIO mode, and do not drive it with a logic signal."
      },
      {
        "number": "64",
        "name": "VDD",
        "type": "power_in",
        "description": "1.8V analog supply; pins 1, 2 and 64 may share one bypass capacitor."
      },
      {
        "number": "65",
        "name": "EP",
        "type": "passive",
        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [],
        "pages_sent": 19,
        "cost_usd": 0.0576,
        "at": "2026-11-02T17:05:45"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/fe96529dd99c7566717a7f0ebead3159.pdf",
        "pages": 19,
        "sha256": "636e51e2f0d18770",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 65,
        "described": 65,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "zgad125d14.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          0.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "dce07a86ec3fe3ca87eebdff13827f55e036ced5518fee01f85cec4a3f56366d",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "zgad125d14-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9,
          9,
          0.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "7a66c2cc36ce7c67730cb4d8ed578dfaaec596b67b0cc784c797389145990d98",
        "checked": "2026-11-02",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Zynalog",
      "Package": "QFN-64(9x9)",
      "Category": "ADC/DAC/Data Conversion",
      "Pins": "65"
    },
    "characteristics": {
      "version": 1,
      "source": "datasheet",
      "datasheet_sha256": "636e51e2f0d187706267cd9ce06e19f99af0730199860b0bd4c464c389742a4a",
      "rows": [
        {
          "name": "模拟电源输入电压",
          "symbol": "VDD",
          "kind": "electrical",
          "unit": "V",
          "min": 1.7,
          "typ": 1.8,
          "max": 1.9,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "数字电源输入电压",
          "symbol": "DVDD",
          "kind": "electrical",
          "unit": "V",
          "min": 1.7,
          "typ": 1.8,
          "max": 1.9,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "最大输入电压范围",
          "symbol": "VDD,DVDD",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": -0.3,
          "typ": null,
          "max": 2,
          "conditions": "",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "最大输入模拟电压范围",
          "symbol": "Analog Vin",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": -0.3,
          "typ": null,
          "max": null,
          "conditions": "最大值 VDD+0.2",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "SPI/GPIO 最大数字电压范围",
          "symbol": "SPI",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": null,
          "typ": null,
          "max": 3.9,
          "conditions": "下限 VDD",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "LVDS 输出最大数字电压范围",
          "symbol": "Data Output",
          "kind": "absolute_maximum",
          "unit": "V",
          "min": -0.3,
          "typ": null,
          "max": null,
          "conditions": "最大值 DVDD+0.2",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "工作温度",
          "symbol": "",
          "kind": "absolute_maximum",
          "unit": "°C",
          "min": -40,
          "typ": null,
          "max": 85,
          "conditions": "",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "储存温度",
          "symbol": "",
          "kind": "absolute_maximum",
          "unit": "°C",
          "min": -65,
          "typ": null,
          "max": 150,
          "conditions": "",
          "source_page": 6,
          "source": "datasheet"
        },
        {
          "name": "积分非线性",
          "symbol": "INL",
          "kind": "electrical",
          "unit": "LSB",
          "min": -2,
          "typ": 1,
          "max": 2,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "微分非线性",
          "symbol": "DNL",
          "kind": "electrical",
          "unit": "LSB",
          "min": -0.6,
          "typ": 0.35,
          "max": 0.6,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "偏置误差",
          "symbol": "Offset Error",
          "kind": "electrical",
          "unit": "mV",
          "min": -13,
          "typ": 5,
          "max": 13,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "增益误差",
          "symbol": "Gain Error",
          "kind": "electrical",
          "unit": "%FS",
          "min": -4,
          "typ": 1,
          "max": 2.2,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "数字输出差分电压 (3.5mA 模式下)",
          "symbol": "V_OD",
          "kind": "electrical",
          "unit": "mV",
          "min": 247,
          "typ": 350,
          "max": 454,
          "conditions": "3.5mA 模式",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "数字输出差分电压 (1.75mA 模式下)",
          "symbol": "V_OD",
          "kind": "electrical",
          "unit": "mV",
          "min": 125,
          "typ": 175,
          "max": 250,
          "conditions": "1.75mA 模式",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "数字输出共模电压",
          "symbol": "V_OS",
          "kind": "electrical",
          "unit": "V",
          "min": 1.125,
          "typ": 1.25,
          "max": 1.375,
          "conditions": "",
          "source_page": 4,
          "source": "datasheet"
        },
        {
          "name": "时钟输入高保持时间",
          "symbol": "tH",
          "kind": "timing",
          "unit": "ns",
          "min": 3.8,
          "typ": null,
          "max": 4,
          "conditions": "VDD=1.8V, DVDD=1.8V, fS=125MHz",
          "source_page": 10,
          "source": "datasheet"
        },
        {
          "name": "时钟输入低保持时间",
          "symbol": "tL",
          "kind": "timing",
          "unit": "ns",
          "min": 3.8,
          "typ": null,
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