component

ZD25Q128CSIGT

Public Made by Adom

by adom

Zetta NOR FLASH, SOP-8-208mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs zd25q128csigt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md zd25q128csigt: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago
zd25q128csigt-etched.fit.json zd25q128csigt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
zd25q128csigt-etched.glb zd25q128csigt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
zd25q128csigt-etched.step zd25q128csigt: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
zd25q128csigt.glb Publish 0.1.0 · Ray 1mo ago
zd25q128csigt.kicad_mod Publish 0.1.0 · Ray 1mo ago
zd25q128csigt.kicad_sym Publish 0.1.0 · Ray 1mo ago
zd25q128csigt.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
zd25q128csigt.step Publish 0.1.0 · Ray 1mo ago

ZD25Q128CSIGT

Zetta · NOR FLASH · SOP-8-208mil

ZD25Q128CSIGT from Zetta, in a SOP-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select input, active low. Drive low to select the device and initiate a command; drive high to deselect and place SO/IO pins in High-Z.
2 SO/IO1 bidirectional Serial Data Output in Standard SPI mode; bidirectional Data I/O bit 1 in Dual/Quad SPI and QPI modes. Data is shifted out on the falling edge of SCLK in single-mode.
3 WP#/IO2 bidirectional Active-low Write Protect input in Standard/Dual SPI mode (blocks writes to the Status Register when SRP0=1); becomes bidirectional Data I/O bit 2 in Quad SPI/QPI modes.
4 VSS power_in Ground reference for the device (0 V).
5 SI/IO0 bidirectional Serial Data Input in Standard SPI mode; bidirectional Data I/O bit 0 in Dual/Quad SPI and QPI modes. Data is latched on the rising edge of SCLK in single-mode.
6 SCLK input Serial Clock input. Provides the timing reference for all serial input and output; up to 133 MHz. Supports SPI mode 0 (CPOL=0, CPHA=0) and mode 3 (CPOL=1, CPHA=1).
7 HOLD#/RESET#/IO3 bidirectional Multi-function pin: HOLD# pauses serial communication (Standard/Dual SPI, active low) or RESET# performs a hardware reset, depending on the HOLD/RST configuration bit; becomes bidirectional Data I/O bit 3 in Quad SPI/QPI modes.
8 VCC power_in Core and I/O power supply, 2.7 V to 3.6 V. Typical standby current 15 uA; deep power-down current 1 uA typical.

Key specifications

Parameter Value
Manufacturer Zetta
Package SOP-8-208mil
Category Memory
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • ZD25Q128CSIGT

CAD (KiCad official)

  • Symbol: ZD25Q128CSIGT
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8-208mil (KiCad packages3D, STEP)
  • 3D model files: zd25q128csigt-etched.step / zd25q128csigt-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zd25q128csigt.step / zd25q128csigt.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
zd25q128csigt.step 122 KB You want the bare part, or you mark your own boards.
zd25q128csigt-etched.step 2.7 MB You want the part with ZD25Q128CSIGT already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 654 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Zetta datasheet (85 pp, sha256 5be74b7133003016, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF