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Contents

README

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ZABG6003JA16TC

Diodes Incorporated · Power Management - Specialized · QFN-16-EP(3x3)

ZABG6003JA16TC from Diodes Incorporated, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D2 output Drain supply connection for GaAs FET 2, regulated voltage approximately 2.0V with current limited to 10mA internally.
2 G2 output Gate bias output for GaAs FET 2, voltage range -2.5V to +1.0V with current limited to ±60µA.
3 D3 output Drain supply connection for GaAs FET 3, regulated voltage approximately 2.0V with current limited to 10mA internally.
4 G3 output Gate bias output for GaAs FET 3, voltage range -2.5V to +1.0V with current limited to ±60µA.
5 Gnd power_in Ground reference connection.
6 CSUB power_out Negative rail output providing regulated -2.0V ±0.5V supply, requires external 47nF capacitor for switched-capacitor DC-DC converter.
7 RCAL1 passive Resistor connection for drain current programming of D1 and D4 stages, external resistor sets drain current 4mA to 15mA.
8 G6 output Gate bias output for GaAs FET 6, voltage range -2.5V to +1.0V with current limited to ±60µA.
9 D6 output Drain supply connection for GaAs FET 6, regulated voltage approximately 2.0V with current limited to 10mA internally.
10 G5 output Gate bias output for GaAs FET 5, voltage range -2.5V to +1.0V with current limited to ±60µA.
11 D5 output Drain supply connection for GaAs FET 5, regulated voltage approximately 2.0V with current limited to 10mA internally.
12 G4 output Gate bias output for GaAs FET 4, voltage range -2.5V to +1.0V with current limited to ±60µA.
13 D4 output Drain supply connection for GaAs FET 4, regulated voltage approximately 2.0V with current programmable 4mA to 15mA via RCAL1.
14 VDD power_in Supply voltage input, operating range 2.1V to 5.5V, absolute maximum rating +6.0V.
15 D1 output Drain supply connection for GaAs FET 1, regulated voltage approximately 2.0V with current programmable 4mA to 15mA via RCAL1.
16 G1 output Gate bias output for GaAs FET 1, voltage range -2.5V to +1.0V with current limited to ±60µA.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Diodes Incorporated
Package QFN-16-EP(3x3)
Category Power Management (PMIC)
Pins 17

CAD (KiCad official)

  • Symbol: ZABG6003JA16TC
  • Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
  • 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
  • 3D model files: zabg6003ja16tc-etched.step / zabg6003ja16tc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); zabg6003ja16tc.step / zabg6003ja16tc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Diodes Incorporated datasheet (8 pp, sha256 5e4122d29e46343d, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF