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YJS15G10C

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Yangzhou Yangjie Elec Tech MOSFETs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsyjs15g10c
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs yjs15g10c: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers yjs15g10c: viewers · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json yjs15g10c: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md yjs15g10c: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago
yjs15g10c-etched.fit.json yjs15g10c: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
yjs15g10c-etched.glb yjs15g10c: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
yjs15g10c-etched.step yjs15g10c: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
yjs15g10c.glb Publish 0.1.0 · Ray 1mo ago
yjs15g10c.kicad_mod Publish 0.1.0 · Ray 1mo ago
yjs15g10c.kicad_sym Publish 0.1.0 · Ray 1mo ago
yjs15g10c.lbr Publish 0.1.0 · Ray 1mo ago
yjs15g10c.step Publish 0.1.0 · Ray 1mo ago

YJS15G10C

Yangzhou Yangjie Elec Tech · MOSFETs · SOP-8

YJS15G10C from Yangzhou Yangjie Elec Tech, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source pin. One of four source pins (pins 1-3 tied together on the SOP-8 pinout). Carries the drain-source current up to ID=15A (TA=25°C).
2 S passive Source pin. Ganged with pins 1 and 3. Provides low-impedance return path for drain-source current.
3 S passive Source pin. Ganged with pins 1 and 2 for the MOSFET source terminal.
4 G input Gate pin. Control input for the N-channel enhancement-mode MOSFET. VGS(th) typ 2.8V; absolute max VGS = ±20V. Gate resistance RG typ 0.68Ω at 1MHz.
5 D passive Drain pin. One of four drain pins (pins 5-8 tied together on the SOP-8 pinout). Carries drain current up to ID=15A; VDS max 100V.
6 D passive Drain pin. Ganged with pins 5, 7, 8 for the MOSFET drain terminal.
7 D passive Drain pin. Ganged with pins 5, 6, 8 for the MOSFET drain terminal.
8 D passive Drain pin. Ganged with pins 5, 6, 7 for the MOSFET drain terminal. Multiple drain pins provide low thermal/electrical impedance to the PCB.

Key specifications

Parameter Value
Manufacturer Yangzhou Yangjie Elec Tech
Package SOP-8
Category Transistors/Thyristors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • YJS15G10CF2

CAD (KiCad official)

  • Symbol: YJS15G10C
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: yjs15g10c-etched.step / yjs15g10c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); yjs15g10c.step / yjs15g10c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Yangzhou Yangjie Elec Tech datasheet (None pp, sha256 73d22acb2b3b4488, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF