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Contents

README

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YFW5N10BSI

YFW · MOSFETs · SOT-89

YFW5N10BSI from YFW, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Insulated control terminal; VGS(th) = 1.2-2.5 V (typ 1.5 V), VGS max ±20 V. Drives the N-channel enhancement-mode MOSFET on when VGS exceeds threshold.
2 D passive Drain. High-side switched terminal, VDS max = 100 V, ID = 5 A continuous / 15 A pulsed. On SOT-89 the drain is electrically bonded to the large center tab for heat sinking.
3 S passive Source. Return terminal of the N-channel MOSFET; also the anode reference of the intrinsic body diode (VSD ≤ 1.0 V at IS = 7 A).

Key specifications

Parameter Value
Manufacturer YFW
Package SOT-89
Category Transistors/Thyristors
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • YFW5N10BSI

CAD (KiCad official)

  • Symbol: YFW5N10BSI
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: yfw5n10bsi-etched.step / yfw5n10bsi-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); yfw5n10bsi.step / yfw5n10bsi.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: YFW datasheet (None pp, sha256 41d22bd30df5c9d1, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF