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XTP8012AS2CT
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XTX DC-DC Converters, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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XTP8012AS2CT
XTX · DC-DC Converters · SOT-23-5
XTP8012AS2CT from XTX, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Chip enable pin: drive EN above 1V to turn the part on, drive it below 0.3V to turn it off, and do not leave it floating. |
| 2 | GND | power_in | Ground pin for the regulator; the datasheet gives no electrical limits for this pin and recommends a star ground connection for CIN, the IC ground and COUT in the layout checklist. |
| 3 | SW | output | Power switch output and switch node connected to the inductor, tied to the drains of the internal P-ch and N-ch MOSFET switches. |
| 4 | VIN | power_in | Power supply input that must be closely decoupled to GND with a 10µF or greater ceramic capacitor; the Electrical Characteristics specify an input range of 2.5V to 5.5V. |
| 5 | FB | input | Output voltage feedback pin, where an internal resistive divider scales the output voltage down for comparison to the internal 0.6V reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XTX |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage range | 2.5 | 5.5 | V | 4 | |||
| UVLO | UVLO | 2.1 | 2.3 | 2.5 | V | 4 | |
| UVLO hysteresis | 0.1 | 0.2 | 0.3 | V | 4 | ||
| FB voltage | 588 | 600 | 612 | mV | No load | 4 | |
| Switching frequency | 1.6 | 2 | 2.4 | M | VFB=0.5V | 4 | |
| OTP | 135 | 150 | 165 | ℃ | 4 | ||
| OTP hysteresis | 20 | 30 | 40 | ℃ | 4 | ||
| VIN to GND | -0.3 | 7 | V | 3 | |||
| EN Voltage | -0.3 | 6 | V | 3 | |||
| SW Voltage | -0.3 | V | 3 | ||||
| Peak SW Sink and Source Current | 2.2 | A | 3 | ||||
| Continuous Power Dissipation (TA = 25℃) | PD | 0.5 | W | TA = 25℃ | 3 | ||
| Junction Temperature | -40 | 165 | ℃ | 3 | |||
| Lead Temperature | 260 | ℃ | 3 | ||||
| Storage Temperature | -65 | 150 | ℃ | 3 | |||
| Thermal Resistance junction-to-ambient SOT23-5L | θJA | 170 | ℃/W | Measured on JESD51-7, 4-layer PCB | 3 | ||
| Thermal Resistance junction-to-case | θJC | 75 | ℃/W | 3 |
CAD (KiCad official)
- Symbol:
XTP8012AS2CT - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
xtp8012as2ct-etched.step/xtp8012as2ct-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);xtp8012as2ct.step/xtp8012as2ct.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XTX datasheet (9 pp, sha256
794caaafdefef3cd, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# XTP8012AS2CT
**XTX** · DC-DC Converters · SOT-23-5
XTP8012AS2CT from XTX, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Chip enable pin: drive EN above 1V to turn the part on, drive it below 0.3V to turn it off, and do not leave it floating. |
| 2 | GND | power_in | Ground pin for the regulator; the datasheet gives no electrical limits for this pin and recommends a star ground connection for CIN, the IC ground and COUT in the layout checklist. |
| 3 | SW | output | Power switch output and switch node connected to the inductor, tied to the drains of the internal P-ch and N-ch MOSFET switches. |
| 4 | VIN | power_in | Power supply input that must be closely decoupled to GND with a 10µF or greater ceramic capacitor; the Electrical Characteristics specify an input range of 2.5V to 5.5V. |
| 5 | FB | input | Output voltage feedback pin, where an internal resistive divider scales the output voltage down for comparison to the internal 0.6V reference. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XTX |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage range | | 2.5 | | 5.5 | V | | 4 |
| UVLO | UVLO | 2.1 | 2.3 | 2.5 | V | | 4 |
| UVLO hysteresis | | 0.1 | 0.2 | 0.3 | V | | 4 |
| FB voltage | | 588 | 600 | 612 | mV | No load | 4 |
| Switching frequency | | 1.6 | 2 | 2.4 | M | VFB=0.5V | 4 |
| OTP | | 135 | 150 | 165 | ℃ | | 4 |
| OTP hysteresis | | 20 | 30 | 40 | ℃ | | 4 |
| VIN to GND | | -0.3 | | 7 | V | | 3 |
| EN Voltage | | -0.3 | | 6 | V | | 3 |
| SW Voltage | | -0.3 | | | V | | 3 |
| Peak SW Sink and Source Current | | | | 2.2 | A | | 3 |
| Continuous Power Dissipation (TA = 25℃) | PD | | | 0.5 | W | TA = 25℃ | 3 |
| Junction Temperature | | -40 | | 165 | ℃ | | 3 |
| Lead Temperature | | | | 260 | ℃ | | 3 |
| Storage Temperature | | -65 | | 150 | ℃ | | 3 |
| Thermal Resistance junction-to-ambient SOT23-5L | θJA | | 170 | | ℃/W | Measured on JESD51-7, 4-layer PCB | 3 |
| Thermal Resistance junction-to-case | θJC | | 75 | | ℃/W | | 3 |
## CAD (KiCad official)
- Symbol: `XTP8012AS2CT`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `xtp8012as2ct-etched.step` / `xtp8012as2ct-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xtp8012as2ct.step` / `xtp8012as2ct.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [XTX datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756856451505627136) (9 pp, sha256 `794caaafdefef3cd`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/xtp8012as2ct-datasheet.pdf)