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XT25F64FSSIGU

Public Made by Adom

by adom

XTX NOR FLASH, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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XT25F64FSSIGU

XTX · NOR FLASH · SOP-8

XT25F64FSSIGU from XTX, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS# input Chip Select Input for the serial flash interface (pin 1, top view of the 8-PIN SOP).
2 SO (IO1) bidirectional Data Output (Data Input Output 1); used as IO1 in Dual/Quad SPI operation.
3 WP# (IO2) bidirectional Write Protect Input (Data Input Output 2); used as IO2 in Quad SPI operation and controls write protection via the WP# pin as described in the protection features.
4 VSS power_in Ground reference for the device.
5 SI (IO0) bidirectional Data Input (Data Input Output 0); used as IO0 in Dual/Quad SPI operation.
6 SCLK input Serial Clock Input for the SPI interface.
7 HOLD# (IO3) bidirectional Hold Input (Data Input Output 3); used as IO3 in Quad SPI operation.
8 VCC power_in Power Supply; the device operates from a single 2.7~3.6V supply.

Key specifications

Parameter Value
Manufacturer XTX
Package SOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC(min) to CS# Low tVSL 100 us 44
Write Inhibit Voltage VWI 1.5 2.5 V 44
Input voltage respect to VSS on I/O pins -1 V 44
VCC current (latch-up) -100 100 mA 44
Ambient operating temperature -40 85 °C 45
Storage temperature -65 150 °C 45
Output short circuit current 200 mA 45
Applied input/output voltage -0.5 4 V 45
VCC VCC -0.5 4 V 45
Input capacitance CIN 6 pF VIN=0V 45
Output capacitance COUT 8 pF VOUT=0V 45
Input leakage current ILI -2 2 μA 46
Output leakage current ILO -2 2 μA 46
Standby current ICC1 15 55 μA CS#=VCC; VIN=VCC or VSS 46
Deep power-down current ICC2 0.3 8 μA CS#=VCC; VIN=VCC or VSS 46
Operating current (Read) ICC3 12 20 mA CLK=0.1VCC/0.9VCC at 104MHz, Q=Open(*1,*2,*4 I/O) 46
Operating current (Read) ICC3 8 13 mA CLK=0.1VCC/0.9VCC at 80MHz, Q=Open(*1,*2,*4 I/O) 46
Operating current (PP) ICC4 40 mA CS#=VCC 46
Operating current (WRSR) ICC5 25 mA CS#=VCC 46
Operating current (SE/BE/CE) ICC6 25 mA CS#=VCC 46
Input low voltage VIL -0.5 V 46
Output low voltage VOL 0.2 V IOL=100uA 46
Supply voltage VCC 2.7 3.6 V 46
Serial clock frequency (all commands except Read 03H and Quad I/O Fast Read EBH, 3.0-3.6V, DC=1) fC 133 MHz 3.0-3.6V power supply, DC=1 47
Serial clock frequency (all commands except 03H and EBH, 2.7-3.0V, DC=1) fC1 104 MHz 2.7-3.0V power supply, DC=1 47
Serial clock frequency (all commands except 03H and EBH, DC=0) fC2 104 MHz DC=0 47
Serial clock frequency (Quad I/O Fast Read) fC3 104 MHz Quad I/O Fast Read (EBH) 47
Serial clock frequency (Read) fR 80 MHz Read (03H) 47
Serial clock high time tCLH 45 % PC 47
Serial clock low time tCLL 45 % PC 47
CS# active setup time tSLCH 5 ns 47
CS# active hold time tCHSH 5 ns 47
CS# not active setup time tSHCH 5 ns 47
CS# not active hold time tCHSL 5 ns 47
CS# high time (read/write) tSHSL 20 ns 47
Output disable time tSHQZ 6 ns 47
Output hold time tCLQX 1 ns 47
Clock low to output valid tCLQV 5.5 ns 47
Data in setup time tDVCH 2 ns 47
Data in hold time tCHDX 2 ns 47
Hold# low setup time (relative to clock) tHLCH 5 ns 47
Hold# high setup time (relative to clock) tHHCH 5 ns 47
Hold# high hold time (relative to clock) tCHHL 5 ns 47
Hold# low hold time (relative to clock) tCHHH 5 ns 47
Hold# low to high-Z output tHLQZ 6 ns 47
Hold# high to low-Z output tHHQX 6 ns 47
Write protect setup time before CS# low tWHSL 20 ns 47
Write protect hold time after CS# high tSHWL 100 ns 47
CS# high to deep power-down mode tDP 3 µs 47
CS# high to standby mode without electronic signature read tRES1 20 µs 47
CS# high to standby mode with electronic signature read tRES2 20 µs 48
CS# high to next command after reset (from read) tRST_R 30 µs 48
CS# high to next command after reset (from program) tRST_P 30 µs 48
CS# high to next command after reset (from erase) tRST_E 12 ms 48
Write status register cycle time tW 3 20 ms 48
Page programming time tPP 0.4 2 ms 48
Sector erase time tSE 65 2000 ms 48
Block erase time (32K bytes) tBE1 0.15 2.2 s 48
Block erase time (64K bytes) tBE2 0.3 2.5 s 48
Chip erase time tCE 30 60 s 48

CAD (KiCad official)

  • Symbol: XT25F64FSSIGU
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xt25f64fssigu-etched.step / xt25f64fssigu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xt25f64fssigu.step / xt25f64fssigu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XTX datasheet (54 pp, sha256 a164c64e4d31bb0a, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF