# XRP7665IDBTR-F

**MaxLinear** · DC-DC Converters · SOIC-8-EP

XRP7665IDBTR-F from MaxLinear, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BS | passive | Bootstrap pin; connect a 0.01µF or greater bootstrap capacitor between BS and SW to drive the internal high-side power MOSFET. |
| 2 | IN | power_in | Power input pin; a capacitor should be connected between IN and GND to keep the input voltage constant, with a 4.50V to 18V operating input range. |
| 3 | SW | power_out | Power switch output pin, connected to the inductor and the bootstrap capacitor. |
| 4 | GND | power_in | Ground signal pin. |
| 5 | FB | input | Feedback pin; an external resistor divider programs the output voltage, the over-voltage protection triggers above 1.1V, and the oscillator frequency is lowered for short-circuit protection when the feedback voltage drops below 0.3V. |
| 6 | COMP | passive | Output of the transconductance error amplifier and input to the current comparator; connect an RC network from this pin to GND for loop compensation. |
| 7 | EN | input | Control input; forcing this pin above 2.7V enables the IC and below 0.75V shuts it down, and it should be pulled up to VIN with 100kΩ for automatic startup. |
| 8 | SS | passive | Soft-start control input; a capacitor from SS to GND sets the soft-start period (0.1µF gives 15ms), and leaving SS unconnected disables soft-start. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | MaxLinear |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |

## CAD (KiCad official)

- Symbol: `XRP7665IDBTR-F`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `xrp7665idbtr-f-etched.step` / `xrp7665idbtr-f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xrp7665idbtr-f.step` / `xrp7665idbtr-f.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [MaxLinear datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884226695028736) (12 pp, sha256 `725e3fe0dd7547e9`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xrp7665idbtr-f-datasheet.pdf)