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Generated by kicad-footprint-generator · KiCad file format 20260206

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docs	Publish 0.1.0 · Ray	20d ago
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xr75100eltr-f-etched.glb	xr75100eltr-f: factory component page (tier=lcsc) · Ray	20d ago
xr75100eltr-f-etched.step	xr75100eltr-f: factory component page (tier=lcsc) · Ray	20d ago
xr75100eltr-f-hero.glb	xr75100eltr-f: hero GLB from the etched model (keeps the MPN mark) · Ray	20d ago
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xr75100eltr-f.step	Publish 0.1.0 · Ray	20d ago

XR75100ELTR-F

MaxLinear · DC-DC Converters · QFN-16-EP(3x3)

XR75100ELTR-F from MaxLinear, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GL	output	Driver output for the low-side N-channel synchronous MOSFET.
2	NC	unconnected	Internally not connected; leave this pin floating.
3	SW	passive	Lower supply rail for the high-side gate driver GH; connect to the junction between the two external N-channel MOSFETs.
4	GH	output	Driver output for the high-side N-channel switching MOSFET.
5	BST	power_in	High-side driver supply; connect a 0.1µF bootstrap capacitor between BST and SW.
6	ILIM	passive	Over-current protection programming; connect with a resistor to the drain of the low-side MOSFET.
7	EN/MODE	input	Tri-level precision enable/mode pin: below 1.8V shuts the controller down, 2.0V to 2.9V selects Forced CCM, and above 3.1V selects DCM/CCM depending on load.
8	TON	passive	Constant on-time programming pin; connect a resistor (RON) to AGND.
9	SS	passive	Soft-start pin; connect an external capacitor between SS and AGND to set the soft-start rate from the 10µA internal source.
10	PGOOD	output	Open-drain power-good output that is pulled low when VOUT is outside regulation.
11	FB	input	Feedback input to the feedback comparator; connect a resistor divider to VOUT and GND to program VOUT against the 0.6 V reference.
12	AGND	power_in	Analog ground; the control circuitry of the IC is referenced to this pin.
13	AGND	power_in	Analog ground; the control circuitry of the IC is referenced to this pin.
14	VIN	power_in	IC supply input that provides power to the internal LDO; input range is 5.5V to 40V.
15	VCC	power_out	Output of the internal LDO (about 5.0V); for operation from a 5V rail, VCC should be shorted to VIN.
16	PGND	power_in	Low-side driver ground.
17	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	MaxLinear
Package	QFN-16-EP(3x3)
Category	Power Management (PMIC)
Pins	17

CAD (KiCad official)

Symbol: XR75100ELTR-F
Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)
3D model files: xr75100eltr-f-etched.step / xr75100eltr-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr75100eltr-f.step / xr75100eltr-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: MaxLinear datasheet (16 pp, sha256 90a7c5e492b4e5e1, retrieved 2026-10-09, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF