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Contents

README

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XR4614C

XNRUSEMI · MOSFETs · SOP-8

XR4614C from XNRUSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (channel not labelled in text; symbol diode direction suggests N-Ch, rated VDS 40 V, ID 7.2 A).
2 G1 input Gate of MOSFET 1, VGS rated ±20 V.
3 S2 passive Source of MOSFET 2 (suggested P-Ch, rated VDS -40 V, ID -5.5 A).
4 G2 input Gate of MOSFET 2, VGS rated ±20 V.
5 D2 passive Drain of MOSFET 2, tied to pins 5 and 6 (suggested P-Ch, VDS -40 V).
6 D2 passive Drain of MOSFET 2, tied to pins 5 and 6 (suggested P-Ch, VDS -40 V).
7 D1 passive Drain of MOSFET 1, tied to pins 7 and 8 (suggested N-Ch, VDS 40 V).
8 D1 passive Drain of MOSFET 1, tied to pins 7 and 8 (suggested N-Ch, VDS 40 V).

Key specifications

Parameter Value
Manufacturer XNRUSEMI
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: XR4614C
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xr4614c-etched.step / xr4614c-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr4614c.step / xr4614c.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XNRUSEMI datasheet (8 pp, sha256 a18c6d96360396d7, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF