# XR4606B

**XNRUSEMI** · MOSFETs · SOP-8

XR4606B from XNRUSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (pins 1-2 side); drain-source voltage rating is 20 V for the N-channel and -20 V for the P-channel device. |
| 2 | G1 | input | Gate of MOSFET 1; gate-source voltage is limited to ±12 V. |
| 3 | S2 | passive | Source of MOSFET 2; drain-source voltage rating is 20 V for the N-channel and -20 V for the P-channel device. |
| 4 | G2 | input | Gate of MOSFET 2; gate-source voltage is limited to ±12 V. |
| 5 | D2 | passive | Drain of MOSFET 2, tied internally with pin 6; pulsed drain current is 20 A (N-ch) or -12 A (P-ch). |
| 6 | D2 | passive | Drain of MOSFET 2, tied internally with pin 5; pulsed drain current is 20 A (N-ch) or -12 A (P-ch). |
| 7 | D1 | passive | Drain of MOSFET 1, tied internally with pin 8; pulsed drain current is 20 A (N-ch) or -12 A (P-ch). |
| 8 | D1 | passive | Drain of MOSFET 1, tied internally with pin 7; pulsed drain current is 20 A (N-ch) or -12 A (P-ch). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | XNRUSEMI |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| N-Channel Drain-Source Voltage | VDS |  |  | 20 | V |  | 1 |
| N-Channel Gate-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| N-Channel Continuous Drain Current | ID@TC=25℃ |  |  | 6 | A | TC=25℃, VGS @ 10V | 1 |
| N-Channel Continuous Drain Current | ID@TC=100℃ |  |  | 5 | A | TC=100℃, VGS @ 10V | 1 |
| N-Channel Pulsed Drain Current | IDM |  |  | 20 | A |  | 1 |
| N-Channel Single Pulse Avalanche Energy | EAS |  |  | 72 | mJ |  | 1 |
| N-Channel Avalanche Current | IAS |  |  | 21 | A |  | 1 |
| N-Channel Total Power Dissipation | PD@TC=25℃ |  |  | 2.5 | W | TC=25℃ | 1 |
| Storage Temperature Range (N-Channel column) | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range (N-Channel column) | TJ | -55 |  | 150 | ℃ |  | 1 |
| P-Channel Drain-Source Voltage | VDS |  |  | -20 | V |  | 1 |
| P-Channel Gate-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| P-Channel Continuous Drain Current | ID@TC=25℃ |  |  | -5 | A | TC=25℃, VGS @ 10V | 1 |
| P-Channel Continuous Drain Current | ID@TC=100℃ |  |  | -4 | A | TC=100℃, VGS @ 10V | 1 |
| P-Channel Pulsed Drain Current | IDM |  |  | -12 | A |  | 1 |
| P-Channel Single Pulse Avalanche Energy | EAS |  |  | 59 | mJ |  | 1 |
| P-Channel Avalanche Current | IAS |  |  | -19 | A |  | 1 |
| P-Channel Total Power Dissipation | PD@TC=25℃ |  |  | 2.08 | W | TC=25℃ | 1 |
| Storage Temperature Range (P-Channel column) | TSTG | -55 |  | 150 | ℃ |  | 1 |
| Operating Junction Temperature Range (P-Channel column) | TJ | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance Junction-Ambient | RθJA |  |  | 85 | ℃/W |  | 1 |
| Thermal Resistance Junction-Case | RθJC |  |  | 50 | ℃/W |  | 1 |
| N-Channel Drain-Source Breakdown Voltage | V(BR)DSS | 20 |  |  | V | VGS=0V, ID=250μA | 2 |
| N-Channel Zero Gate Voltage Drain Current | IDSS |  |  | 1 | μA | VDS=20V, VGS=0V | 2 |
| N-Channel Gate to Body Leakage Current | IGSS | -100 |  | 100 | nA | VDS=0V, VGS=±12V | 2 |
| N-Channel Gate Threshold Voltage | VGS(th) | 0.4 | 0.7 | 1 | V | VDS=VGS, ID=250μA | 2 |
| N-Channel Static Drain-Source On-Resistance | RDS(on) |  | 21 | 27 | mΩ | VGS=4.5V, ID=4A | 2 |
| N-Channel Static Drain-Source On-Resistance | RDS(on) |  | 29 | 44 | mΩ | VGS=2.5V, ID=3A | 2 |
| N-Channel Maximum Continuous Drain to Source Diode Forward Current | IS |  |  | 4 | A |  | 2 |
| N-Channel Maximum Pulsed Drain to Source Diode Forward Current | ISM |  |  | 16 | A |  | 2 |
| N-Channel Drain to Source Diode Forward Voltage | VSD |  |  | 1.2 | V | VGS=0V, IS=4A | 2 |
| P-Channel Drain-Source Breakdown Voltage | V(BR)DSS | -20 |  |  | V | VGS=0V, ID= -250μA | 3 |
| P-Channel Zero Gate Voltage Drain Current | IDSS |  |  | -1 | μA | VDS= -20V, VGS=0V | 3 |
| P-Channel Gate to Body Leakage Current | IGSS | -100 |  | 100 | nA | VDS=0V, VGS= ±12V | 3 |
| P-Channel Gate Threshold Voltage | VGS(th) | -0.5 | -0.7 | -1 | V | VDS=VGS, ID= -250μA | 3 |
| P-Channel Static Drain-Source On-Resistance | RDS(on) |  | 52 | 70 | mΩ | VGS= -4.5V, ID= -3A | 3 |
| P-Channel Static Drain-Source On-Resistance | RDS(on) |  | 70 | 100 | mΩ | VGS= -2.5V, ID= -2A | 3 |
| P-Channel Maximum Continuous Drain to Source Diode Forward Current | IS |  |  | -3 | A |  | 3 |
| P-Channel Maximum Pulsed Drain to Source Diode Forward Current | ISM |  |  | -12 | A |  | 3 |
| P-Channel Drain to Source Diode Forward Voltage | VSD |  |  | -1.2 | V | VGS=0V, IS= -3A | 3 |

## CAD (KiCad official)

- Symbol: `XR4606B`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `xr4606b-etched.step` / `xr4606b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `xr4606b.step` / `xr4606b.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [XNRUSEMI datasheet](docs/xr4606b-datasheet.pdf) (6 pp, sha256 `ca86fd53999bbb75`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/xr4606b-datasheet.pdf)