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XR33158ID-F

MaxLinear · Pre-ordered Chips · SOIC-8

XR33158ID-F from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: RO is high when A-B is at least 200mV, low when A-B is at most -200mV, and high if the inputs are left floating, shorted together, or terminated and undriven for more than 2μs.
2 INV input Driver and receiver invert control (active high): when enabled, the polarity of the driver input and receiver bus pins is inverted, and when disabled A is non-inverting and B is inverting. The INV pin has a 150kΩ pull-down resistor.
3 DE input Driver output enable with hot swap protection: when DE is high the outputs are enabled, and when DE is low the outputs are high impedance.
4 DI input Driver input: with DE high, a low on DI forces the non-inverting output low and the inverting output high, and a high on DI forces the non-inverting output high and the inverting output low.
5 GND power_in Ground.
6 A/Y bidirectional Non-inverting receiver input and non-inverting driver output (bus pin, ESD rated ±15kV HBM to GND).
7 B/Z bidirectional Inverting receiver input and inverting driver output (bus pin, ESD rated ±15kV HBM to GND); bus pins withstand direct shorts up to ±60V.
8 VCC power_in 3.0V to 5.5V power supply input; bypass to ground with a 0.1μF capacitor.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC 3 5.5 V 3
Operating temperature range (ID suffix) TA -40 85 °C ID suffix per ordering information; TA = TMIN to TMAX 20
Differential driver output (RL = 100Ω, RS-422) VOD 2 V 4.5V ≤ VCC ≤ 5.5V, RL = 100Ω (RS-422), Figure 4; max printed as VCC 3
Differential driver output (RL = 54Ω, RS-485) VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, RL = 54Ω (RS-485), Figure 4; max printed as VCC 3
Differential driver output over common mode VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, -25V ≤ VCM ≤ 25V, Figure 5; max printed as VCC 3
Differential driver output (RL = 100Ω, RS-422) VOD 0.85 V 3.0V ≤ VCC ≤ 4.5V, RL = 100Ω (RS-422), Figure 4; max printed as VCC 3
Differential driver output (RL = 54Ω, RS-485) VOD 0.65 V 3.0V ≤ VCC ≤ 4.5V, RL = 54Ω (RS-485), Figure 4; max printed as VCC 3
Change in magnitude of differential output voltage ΔVOD -0.2 0.2 V RL = 100Ω (RS-422) or RL = 54Ω (RS-485), Figure 4 3
Driver common-mode output voltage (steady state) VCM 1 3 V 3
Change in magnitude of common-mode output voltage ΔVCM -0.2 0.2 V 3
Logic high input threshold (DI, DE, INV) VIH 2 V VCC = 3.3V, for XR33152/55/58 3
Logic high input threshold (DI, DE, INV) VIH 2.4 V VCC = 5.0V, for XR33152/55/58 3
Logic low input threshold (DI, DE, INV) VIL 0.8 V For XR33152/55/58 3
Logic input current (DI, DE, RE) IIN -1 1 μA 0V ≤ VIN ≤ VCC, for XR33152/55/58; after first transition, Note 2 3
Logic input current (INV) IIN 25 33 55 μA VIN = VCC = 5.5V, for XR33152/55/58 3
Logic input current hot swap (DE and RE) IINHS -200 200 μA Until first transition, Note 2 3
Input current (A and B), VOUT = 12V IA, B 400 μA VOUT = 12V, DE = 0V, VCC = 0V or 5.5V, for XR33156/58 3
Input current (A and B), VOUT = -7V IA, B -320 μA VOUT = -7V, DE = 0V, VCC = 0V or 5.5V, for XR33156/58 3
Driver short-circuit output current IOSD -250 250 mA -60V ≤ VOUT ≤ 60V, Figure 6 4
Thermal shutdown temperature TTS 175 °C Junction temperature, Note 1 4
Thermal shutdown hysteresis TTSH 15 °C Note 1 4
Receiver differential input signal threshold voltage VSTH 85 200 mV -25V ≤ VOUT ≤ 25V 4
Receiver differential input signal hysteresis ΔVSTH 170 mV 4
Negative going receiver differential input failsafe threshold voltage VFSTH- -200 -125 -40 mV -25V ≤ VOUT ≤ 25V 4
Positive going receiver differential input failsafe threshold voltage VFSTH+ -100 -10 mV -25V ≤ VOUT ≤ 25V 4
Receiver differential input failsafe hysteresis ΔVFSTH 25 mV 4
Receiver output low voltage (RO) VOL 0.4 V IOUT = 4mA, for XR33152/55/58 4
High-Z receiver output current IOZR -1 1 μA 0V ≤ VOUT ≤ VCC, for XR33152/55/58 4
RX input resistance RIN 30 kΩ -25V ≤ VCM ≤ 25V, for XR33156/58 (at least) 4
RX output short-circuit current IOSC 110 mA 0V ≤ VRO ≤ VCC, for XR33152/55/58 4
Supply current ICC 4 mA No load, RE = 0V or VCC, DE = VCC, DI = 0V or VCC 4
Driver propagation delay (low to high), 20Mbps tDPLH 25 ns CL = 50pF, RL = 54Ω, Figure 7 7
Driver propagation delay (high to low), 20Mbps tDPHL 25 ns CL = 50pF, RL = 54Ω, Figure 7 7
Differential driver output skew /tDPLH-tDPHL/ 5 ns 7
Driver differential output rise or fall time tDR, tDF 15 ns 7
Maximum data rate (driver) 1/tUI 20 Mbps Duty cycle 40% to 60% 7
Driver enable to output high tDZH 60 ns CL = 50pF, RL = 500Ω, Figure 8 7
Driver enable to output low tDZL 60 ns CL = 50pF, RL = 500Ω, Figure 8 7
Driver disable from output high tDHZ 250 ns 7
Driver disable from output low tDLZ 250 ns 7
Receiver propagation delay (low to high), 20Mbps tRPLH 60 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 7
Receiver propagation delay (high to low), 20Mbps tRPHL 60 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 7
Receiver propagation delay skew /tRPLH-tRPHL/ 5 ns 7
Maximum data rate (receiver) 1/tUI 20 Mbps Duty cycle 40% to 60% 7
Supply voltage (absolute maximum) VCC -0.3 7 V 2
Input voltage at control and driver input (DE, DI, INV) VIN -0.3 V XR33152/55/58; max printed as VCC + 0.3V 2
Receiver output voltage (RO) VRO -0.3 V XR33152/55/58; max printed as VCC + 0.3V 2
Driver output voltage (Y, Z, A/Y and B/Z) VO -60 60 V 2
Receiver input voltage (A, B, A/Y and B/Z) VI -60 60 V 2
Transient voltage pulse VTRANS -100 100 V Through 100Ω (Figure 7) 2
Driver output current IO -250 250 mA 2
Storage temperature range TSTG -65 150 °C 2
Lead temperature TLEAD 300 °C Soldering 10 seconds 2
Maximum junction temperature TJ 150 °C 2
ESD HBM (bus pins) VESD -15 15 kV Human Body Model, A, B, Y and Z pins 2
ESD HBM (all other pins) VESD -4 4 kV Human Body Model, all other pins 2

CAD (KiCad official)

  • Symbol: XR33158ID-F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: xr33158id-f-etched.step / xr33158id-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr33158id-f.step / xr33158id-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (21 pp, sha256 405745147757d309, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF