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XR33053ID-F

MaxLinear · Pre-ordered Chips · SOIC-14

XR33053ID-F from MaxLinear, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 N/C unconnected Not connected on the XR33053 14-pin package.
2 RO output Receiver output: high when RE is low and A-B is at least 200mV, low when A-B is at most -200mV, and high if the inputs are open, shorted or undriven for more than 2µs.
3 RE input Receiver output enable (hot swap): RO is enabled when RE is low and high-impedance when RE is high, and RE should be high with DE low to enter shutdown.
4 DE input Driver output enable (hot swap): outputs are enabled when DE is high and high-impedance when DE is low, and DE should be low with RE high to enter shutdown.
5 DI input Driver input: with DE high, a low on DI forces Y low and Z high, and a high on DI forces Y high and Z low.
6 GND power_in Power ground (one of two ground pins, 6 and 7).
7 GND power_in Power ground (one of two ground pins, 6 and 7).
8 N/C unconnected Not connected on the XR33053 14-pin package.
9 Y output Non-inverting driver output.
10 Z output Inverting driver output.
11 B input Inverting receiver input.
12 A input Non-inverting receiver input.
13 N/C unconnected Not connected on the XR33053 14-pin package.
14 VCC power_in 3.0V to 5.5V power supply input; bypass to ground with a 0.1µF capacitor.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-14
Category Interface ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC 3 5.5 V 2
VCC VCC -0.3 7 V 2
Input voltage (DE and DI) -0.3 7 V 2
Input voltage (RE) -0.3 V Maximum printed as VCC + 0.3V 2
Receiver output voltage (RO) -0.3 V Maximum printed as VCC + 0.3V 2
Driver output voltage (Y, Z, A/Y and B/Z) -60 60 V 2
Receiver input voltage (A, B, A/Y and B/Z) -60 60 V 2
Transient voltage pulse -100 100 V Through 100Ω 2
Driver output current -250 250 mA 2
Maximum junction temperature 150 °C 2
Storage temperature -65 150 °C 2
Lead temperature (soldering 10 seconds) 300 °C Soldering 10 seconds 2
ESD HBM (A, B, Y and Z pins) -15 15 kV Human Body Model 2
ESD HBM (all other pins) -4 4 kV Human Body Model 2
Operating temperature range -40 85 °C XR33053ID-F (ID grade) per ordering information 19
Differential driver output (RS-422) VOD 2 V 4.5V ≤ VCC ≤ 5.5V, RL = 100Ω (RS-422), Figure 3; maximum printed as VCC 3
Differential driver output (RS-485) VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, RL = 54Ω (RS-485), Figure 3; maximum printed as VCC 3
Differential driver output over common mode VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, -25V ≤ VCM ≤ 25V, Figure 4; maximum printed as VCC 3
Differential driver output (RS-422) VOD 0.85 V 3.0V ≤ VCC ≤ 4.5V, RL = 100Ω (RS-422), Figure 3; maximum printed as VCC 3
Differential driver output (RS-485) VOD 0.65 V 3.0V ≤ VCC ≤ 4.5V, RL = 54Ω (RS-485), Figure 3; maximum printed as VCC 3
Change in magnitude of differential output voltage ΔVOD -0.2 0.2 V RL = 100Ω (RS-422) or RL = 54Ω (RS-485), Figure 3 3
Driver common-mode output voltage (steady state) VCM 1 3 V Steady state 3
Change in magnitude of common-mode output voltage ΔVCM -0.2 0.2 V 3
Logic input current (DI, DE and RE) IIN -1 1 µA 0V ≤ VIN ≤ VCC, after first transition 3
Logic input current hot swap (DE and RE) IINHS -200 100 200 µA Until first transition 3
Driver short-circuit output current IOSD -250 250 mA -60V ≤ VOUT ≤ 60V, DI = 0V or VCC, Figure 5 3
Receiver differential input signal threshold voltage (VA - VB) VSTH -85 200 mV -25V ≤ VOUT ≤ 25V 4
Negative going receiver differential input fail-safe threshold voltage (VA - VB) VFSTH- -200 -125 -40 mV -25V ≤ VOUT ≤ 25V 4
Positive going receiver differential input fail-safe threshold voltage (VA - VB) VFSTH+ -100 -10 mV -25V ≤ VOUT ≤ 25V 4
High-Z receiver output current IOZR -1 1 µA 0V ≤ VOUT ≤ VCC 4
Supply current in shutdown mode ISHDN 0.001 1 µA RE = VCC, DE = 0V 4
Driver propagation delay (low to high) tDPLH 150 500 ns CL = 50pF, RL = 54Ω, Figure 7 6
Driver propagation delay (high to low) tDPHL 150 500 ns CL = 50pF, RL = 54Ω, Figure 7 6
Differential driver output skew /tDPLH-tDPHL/ 5 50 ns 6
Driver differential output rise or fall time tDR, tDF 100 200 300 ns 6
Driver enable to output high tDZH 1000 2500 ns CL = 50pF, RL = 500Ω, Figure 8 6
Driver enable to output low tDZL 1000 2500 ns CL = 50pF, RL = 500Ω, Figure 8 6
Driver enable from shutdown to output high tDZH(SHDN) 2500 4500 ns CL = 50pF, RL = 500Ω, Figure 8 6
Driver enable from shutdown to output low tDZL(SHDN) 2500 4500 ns CL = 50pF, RL = 500Ω, Figure 8 6
Time to shutdown (driver table) tSHDN 50 200 600 ns Notes 1 and 2 6
Time to shutdown (receiver table) tSHDN 50 200 600 ns Notes 1 and 2 6
Logic high input thresholds (DI, DE and RE) VIH 2 V VCC = 3.3V 3
Logic high input thresholds (DI, DE and RE) VIH 2.4 V VCC = 5.0V 3
Logic low input thresholds (DI, DE and RE) VIL 0.8 V 3
Input hysteresis (DI, DE and RE) VHYS 100 mV 3
Input current (A and B) IA, B 100 µA VCC = 0V or 5.5V, VOUT = 12V, DE = 0V, for XR33052/53/55 3
Input current (A and B) IA, B -80 µA VCC = 0V or 5.5V, VOUT = -7V, DE = 0V, for XR33052/53/55 3
Output leakage (Y and Z) full-duplex IOL 100 µA VOUT = 12V, DE = 0V, VCC = 0V or 5.5V 3
Output leakage (Y and Z) full-duplex IOL -80 µA VOUT = -7V, DE = 0V, VCC = 0V or 5.5V 3
Thermal shutdown temperature TTS 175 °C Junction temperature(1) 4
Receiver output low voltage (RO) VOL 0.4 V IOUT = 4mA 4
RX input resistance RIN 120 kΩ -25V ≤ VCM ≤ 25V, XR33052/53/55 4
Supply current ICC 4 mA No load, RE = 0V or VCC, DE = VCC, DI = 0V or VCC 4
Maximum data rate (driver table) 1 Mbps 1/tUI, duty cycle 40% to 60% 6
Driver disable from output high tDHZ 250 ns 6
Receiver propagation delay (low to high) tRPLH 200 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 6
Receiver propagation delay (high to low) tRPHL 200 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 6
Receiver propagation delay skew /tRPLH-tRPHL/ 30 ns 6
Maximum data rate (receiver table) 1 Mbps 1/tUI, duty cycle 40% to 60% 6

CAD (KiCad official)

  • Symbol: XR33053ID-F
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: xr33053id-f-etched.step / xr33053id-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr33053id-f.step / xr33053id-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (20 pp, sha256 d4d2065166fbb06f, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF