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XR33052IDTR-F

Public Made by Adom

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MaxLinear Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsxr33052idtr-ffactory-2.0.0extractor-text

Verified XR33052IDTR-F

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: XR33052IDTR-F · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 20-page datasheet
  • ✓distributor: lcsc C2671984, digikey 1016-XR33052IDTR-FTR-ND, mouser 701-XR33052IDTR-F
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-st87q8uc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ xr33052idtr-f.kicad_sym✓ xr33052idtr-f.kicad_mod✓ xr33052idtr-f.step
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Ray Publish 0.1.0 f23808e 9d ago

XR33052IDTR-F

MaxLinear · Pre-ordered Chips · SOIC-8

XR33052IDTR-F from MaxLinear, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: when RE is low, RO is high if (A-B) ≥ 200mV and low if (A-B) ≤ -200mV, and it is high if inputs are open, shorted or terminated and undriven for more than 2µs.
2 RE input Receiver output enable (hot swap): low enables RO, high puts RO in high impedance, and RE high with DE low enters shutdown mode.
3 DE input Driver output enable (hot swap): high enables the driver outputs, low puts them in high impedance, and DE low with RE high enters shutdown mode.
4 DI input Driver input: with DE high, a low on DI forces the non-inverting output low and inverting output high, and a high on DI does the opposite.
5 GND power_in Ground.
6 A/Y bidirectional Non-inverting receiver input and non-inverting driver output, with ±60V fault tolerance and ±15kV HBM ESD protection.
7 B/Z bidirectional Inverting receiver input and inverting driver output, with ±60V fault tolerance and ±15kV HBM ESD protection.
8 VCC power_in 3.0V to 5.5V power supply input, bypass to ground with 0.1µF capacitor.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC 3 5.5 V 3
Differential driver output, RS-422 VOD 2 V 4.5V ≤ VCC ≤ 5.5V, RL = 100Ω (RS-422), Figure 3 3
Differential driver output, RS-485 VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, RL = 54Ω (RS-485), Figure 3 3
Differential driver output over common mode VOD 1.5 V 4.5V ≤ VCC ≤ 5.5V, -25V ≤ VCM ≤ 25V, Figure 4 3
Differential driver output, RS-422 (3.0V to 4.5V) VOD 0.85 V 3.0V ≤ VCC ≤ 4.5V, RL = 100Ω (RS-422), Figure 3 3
Differential driver output, RS-485 (3.0V to 4.5V) VOD 0.65 V 3.0V ≤ VCC ≤ 4.5V, RL = 54Ω (RS-485), Figure 3 3
Change in magnitude of differential output voltage ∆VOD -0.2 0.2 V RL = 100Ω (RS-422) or RL = 54Ω (RS-485), Figure 3 3
Driver common-mode output voltage (steady state) VCM 1 3 V 3
Change in magnitude of common-mode output voltage ∆VCM -0.2 0.2 V 3
Logic high input threshold (DI, DE, RE) at 3.3V VIH 2 V VCC = 3.3V 3
Logic high input threshold (DI, DE, RE) at 5.0V VIH 2.4 V VCC = 5.0V 3
Logic low input threshold (DI, DE, RE) VIL 0.8 V 3
Input hysteresis (DI, DE, RE) VHYS 100 mV 3
Logic input current (DI, DE, RE) IIN -1 1 µA 0V ≤ VIN ≤ VCC, After first transition 3
Logic input current hot swap (DE and RE) IINHS -200 100 200 µA Until first transition 3
Input current (A and B) at 12V IA, B 100 µA VCC = 0V or 5.5V, VOUT = 12V, DE = 0V, for XR33052/53/55 3
Input current (A and B) at -7V IA, B -80 µA VCC = 0V or 5.5V, VOUT = -7V, DE = 0V, for XR33052/53/55 3
Driver short-circuit output current IOSD -250 250 mA -60V ≤ VOUT ≤ 60V, DI = 0V or VCC, Figure 5 3
Receiver differential input signal threshold voltage VSTH -200 200 mV -25V ≤ VOUT ≤ 25V 4
Negative going receiver fail-safe threshold voltage VFSTH- -200 -125 -40 mV -25V ≤ VOUT ≤ 25V 4
Positive going receiver fail-safe threshold voltage VFSTH+ -100 -10 mV -25V ≤ VOUT ≤ 25V 4
Receiver output low voltage (RO) VOL 0.4 V IOUT = 4mA 4
High-Z receiver output current IOZR -1 1 µA 0V ≤ VOUT ≤ VCC 4
RX input resistance RIN 120 kΩ -25V ≤ VCM ≤ 25V, XR33052/53/55 4
RX output short-circuit current IOSC 110 mA 0V ≤ VRO ≤ VCC 4
Supply current ICC 4 mA No load, RE = 0V or VCC, DE = VCC, DI = 0V or VCC 4
Supply current in shutdown mode ISHDN 0.001 1 µA RE = VCC, DE = 0V 4
Thermal shutdown temperature TTS 175 °C Junction temperature 4
Thermal shutdown hysteresis TTSH 15 °C 4
Receiver differential input signal hysteresis ∆VSTH 170 mV 4
Receiver fail-safe hysteresis ∆VFSTH 25 mV 4
Driver propagation delay (low to high) tDPLH 350 1500 ns CL = 50pF, RL = 54Ω, Figure 7 5
Driver propagation delay (high to low) tDPHL 350 1600 ns CL = 50pF, RL = 54Ω, Figure 7 5
Differential driver output skew /tDPLH-tDPHL/ 20 200 ns CL = 50pF, RL = 54Ω, Figure 7 5
Driver differential output rise or fall time tDR, tDF 400 1500 ns CL = 50pF, RL = 54Ω, Figure 7 5
Driver maximum data rate 250 kbps 1/tUI, duty cycle 40% to 60% 5
Driver enable to output high tDZH 200 2500 ns CL = 50pF, RL = 500Ω, Figure 8 5
Driver enable to output low tDZL 200 2500 ns CL = 50pF, RL = 500Ω, Figure 8 5
Driver disable from output high tDHZ 250 ns CL = 50pF, RL = 500Ω, Figure 8 5
Driver disable from output low tDLZ 250 ns CL = 50pF, RL = 500Ω, Figure 8 5
Driver enable from shutdown to output high tRZH(SHDN) 5500 ns CL = 50pF, RL = 500Ω, Figure 8 5
Driver enable from shutdown to output low tRZL(SHDN) 5500 ns CL = 50pF, RL = 500Ω, Figure 8 5
Time to shutdown tSHDN 50 200 600 ns Notes 1 and 2 5
Receiver propagation delay (low to high) tRPLH 200 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 5
Receiver propagation delay (high to low) tRPHL 200 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 5
Receiver propagation delay skew /tRPLH-tRPHL/ 30 ns CL = 15pF, VID = ±2V, VID rise and fall times < 15ns, Figure 9 5
Receiver maximum data rate 250 kbps 1/tUI, duty cycle 40% to 60% 5
Receiver enable to output high tRZH 50 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Receiver enable to output low tRZL 50 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Receiver disable from output high tRHZ 50 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Receiver disable from output low tRLZ 50 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Receiver enable from shutdown to output high tRZH(SHDN) 3500 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Receiver enable from shutdown to output low tRZL(SHDN) 3500 ns CL = 15pF, RL = 1kΩ, Figure 10 5
Supply voltage VCC -0.3 7 V 2
Input voltage (DE and DI) -0.3 7 V 2
Driver output voltage (A/Y and B/Z) -60 60 V 2
Receiver input voltage (A/Y and B/Z) -60 60 V 2
Driver output current -250 250 mA 2
Maximum junction temperature 150 °C 2
Storage temperature -65 150 °C 2
Operating temperature range -40 85 °C XR33052IDTR-F ordering table range 19

CAD (KiCad official)

  • Symbol: XR33052IDTR-F
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: xr33052idtr-f-etched.step / xr33052idtr-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr33052idtr-f.step / xr33052idtr-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (20 pp, sha256 d4d2065166fbb06f, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF