main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers xr22801il32tr-f: symbol viewer · Ray 5d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 33 pins · Ray 7d ago
xr22801il32tr-f-etched.glb Publish 0.1.0 · Ray 7d ago
xr22801il32tr-f-etched.step xr22801il32tr-f: factory component page (tier=mfr) · Ray 7d ago
xr22801il32tr-f-hero.glb xr22801il32tr-f: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
xr22801il32tr-f-hero.overlay.json Publish 0.1.0 · Ray 7d ago
xr22801il32tr-f.glb Publish 0.1.0 · Ray 7d ago
xr22801il32tr-f.kicad_mod Publish 0.1.0 · Ray 7d ago
xr22801il32tr-f.kicad_sym xr22801il32tr-f: symbol repaired (body fitted to the names) · Ray 5d ago
xr22801il32tr-f.lbr xr22801il32tr-f: symbol repaired (body fitted to the names) · Ray 5d ago
xr22801il32tr-f.step Publish 0.1.0 · Ray 7d ago

XR22801IL32TR-F

MaxLinear · USB ICs · QFN-32-EP(5x5)

XR22801IL32TR-F from MaxLinear, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBUS_SENSE input VBUS sense input; in self-powered mode connect VBUS through a high-value divider (VBUS=5V, VBUS_SENSE=3.3V) decoupled by 0.1uF, used to disable the USBD+ pull-up when VBUS is absent, ignored in bus-powered mode.
2 REXT input Connect externally using a short trace to a 226 ohm 1% resistor to ground.
3 CAP1 input Connect externally to CAP2 and 3V3_OUT using a short trace.
4 GND power_in Power supply common, ground.
5 USBD- bidirectional USB port differential data negative.
6 USBD+ bidirectional USB port differential data positive.
7 VCC power_in 5.0V power supply input.
8 ETH_SPD output Ethernet 100 Mbps speed indicator, asserted high for 100 Mbps.
9 XTALOUT output Crystal or buffered clock output.
10 XTALIN input 25 MHz +/- 50 ppm crystal or external clock input.
11 3V3_OUT power_out 3.3V output power; connect to CAP1 and CAP2 using a short trace and decouple with a minimum 4.7uF capacitor.
12 GND power_in Power supply common, ground.
13 ETH_TX- output Ethernet transmit data out negative.
14 ETH_TX+ output Ethernet transmit data out positive.
15 ETH_RX+ input Ethernet receive data in positive.
16 ETH_RX- input Ethernet receive data in negative.
17 E0/RI#/RWK#/G0 bidirectional Enhanced GPIO, UART Ring Indicator, remote wakeup, or general purpose IO; defaults to UART GPIO input.
18 E1/CD#/G1 bidirectional Enhanced GPIO, UART Carrier Detect, or general purpose IO; defaults to UART GPIO input.
19 ETH_LINK output Ethernet 10/100 activity indicator that toggles with activity.
20 CAP2 input Connect externally to CAP1 and 3V3_OUT using a short trace.
21 GND power_in Power supply common, ground.
22 GND power_in Power supply common, ground.
23 E6/RX/RWK# bidirectional Enhanced GPIO, UART RX data, or remote wakeup; defaults to UART RX data.
24 E7/TX bidirectional Enhanced GPIO or UART TX data; defaults to UART TX data.
25 E5/RTS#/RS485/G5 bidirectional Enhanced GPIO, UART Request to Send, auto-RS485 half-duplex enable, or general purpose IO; defaults to UART GPIO input except with CDC-ACM driver.
26 E4/CTS#/G4 bidirectional Enhanced GPIO, UART Clear to Send, or general purpose IO; defaults to UART GPIO input except with CDC-ACM driver.
27 LOW_PWR# output Asserted when it is not safe to draw the current requested from VBUS (suspend or not yet configured); default active low, polarity programmable via OTP.
28 GND power_in Power supply common, ground.
29 E2/DSR#/G2 bidirectional Enhanced GPIO, UART Data Set Ready, or general purpose IO; defaults to UART GPIO input.
30 E3/DTR#/G3 bidirectional Enhanced GPIO, UART Data Terminal Ready, or general purpose IO; defaults to UART GPIO input.
31 SCL bidirectional I2C master controller serial clock (open-drain); external pull-up resistor required.
32 SDA bidirectional I2C master controller data (open-drain); external pull-up resistor required.
33 CNTR_PAD power_in Center pad; must be connected to ground.

Key specifications

Parameter Value
Manufacturer MaxLinear
Package QFN-32-EP(5x5)
Category Interface ICs
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Supply Voltage (operating) VCC 4.4 5.25 V 3
Operating Temperature Range -40 85 °C 3
VCC Supply Voltage (absolute max) VCC 5.75 V 3
Input Voltage (all pins except SCL, SDA, USBD+, USBD-) -0.3 4 V 3
Input Voltage (USBD+ and USBD-) -0.3 5.75 V 3
Input Voltage (SCL and SDA) -0.3 6 V 3
Operating Current ICC 185 250 mA No load on GPIO pins or 3V3_OUT 3
Suspend Mode Current ISUSP 3 4.5 mA No load on GPIO pins or 3V3_OUT 3
Input Low Voltage (UART, VBUS_SENSE, LOW_PWR#, EDGE) VIL -0.3 0.8 V 3
Input High Voltage (UART, VBUS_SENSE, LOW_PWR#, EDGE) VIH 2 3.6 V 3
Output Low Voltage (UART, VBUS_SENSE, LOW_PWR#, EDGE) VOL 0.3 V IOL = 4mA 3
Output High Voltage (UART, VBUS_SENSE, LOW_PWR#, EDGE) VOH 2.2 V IOL = -4mA 3
Input Low Leakage Current IIL -10 10 μA 3
Input High Leakage Current IIH -10 10 μA 3
Input Pin Capacitance CIN 5 pF 3
USB Output Low Voltage (Full-speed) VOL 0 0.3 V Full-speed USB. External 15kΩ to GND on USBD+ and USBD- pins 3
USB Output High Voltage (Full-speed) VOH 2.8 3.6 V Full-speed USB. External 15kΩ to GND on USBD+ and USBD- pins 3
USB Output Low Voltage (Hi-speed) VOL -300 300 mV Hi-speed USB. External 45 Ω to GND on USBD+ and USBD- pins 3
USB Output High Voltage (Hi-speed) VOH 360 440 mV Hi-speed USB. External 45 Ω to GND on USBD+ and USBD- pins 3
Driver Output Impedance VDrvZ 45 Ω 3
Output Short Circuit Current IOSC 52 mA 1.5V on USBD+ and USBD- pins 3
Peak Differential Output Voltage High (100Base-TX) VPPH 950 1050 mV Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Peak Differential Output Voltage Low (100Base-TX) VPPL -1050 -950 mV Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Signal Amplitude Symmetry VSAS 98 102 % Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Signal Rise and Fall Time TRF 3 5 ns Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Duty Cycle Distortion DCD 0 0.5 ns Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Overshoot and Undershoot VOS 0 5 % Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
Transmit Jitter 0 1.4 ns Measured differentially 4
Peak Differential Output Voltage High (10Base-T) VPPH 2.2 2.8 V Measured at line side of transformer, line replaced by differential resistance of 100 ohms. 4
3.3V Regulated Output Voltage VOUT 3 3.3 3.6 V Max load current 50 mA 4

CAD (KiCad official)

  • Symbol: XR22801IL32TR-F
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: xr22801il32tr-f-etched.step / xr22801il32tr-f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xr22801il32tr-f.step / xr22801il32tr-f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MaxLinear datasheet (43 pp, sha256 08432b21cfd66cce, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF