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Ray Publish 0.1.0 2c77e97 15d ago

XPH3R114MC

TOSHIBA · MOSFETs · SOP-8

XPH3R114MC from TOSHIBA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source passive Source terminal (pins 1, 2, 3 are all Source) of the P-channel MOSFET with VDSS of -40 V.
2 Source passive Source terminal (pins 1, 2, 3 are all Source) of the P-channel MOSFET with VDSS of -40 V.
3 Source passive Source terminal (pins 1, 2, 3 are all Source) of the P-channel MOSFET with VDSS of -40 V.
4 Gate input Gate terminal with gate-source voltage rating of +10/-20 V and threshold voltage Vth of -1.0 to -2.1 V.
5 Drain passive Drain terminal (pins 5, 6, 7, 8 are all Drain) with DC drain current of -100 A max.
6 Drain passive Drain terminal (pins 5, 6, 7, 8 are all Drain) with DC drain current of -100 A max.
7 Drain passive Drain terminal (pins 5, 6, 7, 8 are all Drain) with DC drain current of -100 A max.
8 Drain passive Drain terminal (pins 5, 6, 7, 8 are all Drain) with DC drain current of -100 A max.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOP-8
Category Triode/MOS Tube/Transistor
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDSS -40 V Ta = 25 °C 2
Gate-source voltage VGSS -20 10 V +10/-20 V 2
Drain current (DC) ID -100 A Tc = 25 °C 2
Drain current (pulsed) IDP -200 A 2
Single-pulse avalanche energy EAS 173 mJ VDD = -25 V, Tch = 25 °C (initial), L = 18 µH, RG = 25 Ω, IAS = -100 A, VGS = 0/-15 V 2
Single-pulse avalanche current IAS -100 A 2
Channel temperature Tch 175 °C 2
Storage temperature Tstg -55 175 °C 2
Power dissipation PD 3 W t = 10 s, Note 2 2
Power dissipation PD 0.96 W t = 10 s, Note 3 2
Channel-to-case thermal impedance zth(ch-c) 0.88 °C/W Tc = 25 °C 2
Channel-to-ambient thermal impedance zth(ch-a) 50 °C/W t = 10 s, Note 2 2
Channel-to-ambient thermal impedance zth(ch-a) 156 °C/W t = 10 s, Note 3 2
Gate leakage current IGSS -1 1 µA VGS = +10/-20 V, VDS = 0 V 3
Drain cut-off current IDSS -10 µA VDS = -40 V, VGS = 0 V 3
Drain-source breakdown voltage V(BR)DSS -40 V ID = -10 mA, VGS = 0 V 3
Drain-source breakdown voltage V(BR)DSX -30 V ID = -10 mA, VGS = 10 V 3
Gate threshold voltage Vth -1 -2.1 V VDS = -10 V, ID = -1.0 mA 3
Drain-source on-resistance RDS(ON) 3.1 4.7 mΩ VGS = -4.5 V, ID = -50 A 3
Drain-source on-resistance RDS(ON) 2.4 3.1 mΩ VGS = -10 V, ID = -50 A 3
Gate resistance rg 13 26 Ω VDS = -10 V, VGS = 0 V, f = 300 kHz 3
Reverse drain current (DC) IDR -100 A 3
Reverse drain current (pulsed) IDRP -200 A 3
Diode forward voltage VDSF 1.2 V IDR = -100 A, VGS = 0 V 3
Input capacitance Ciss 9500 pF VDS = -10 V, VGS = 0 V, f = 300 kHz 3
Reverse transfer capacitance Crss 1110 pF VDS = -10 V, VGS = 0 V, f = 300 kHz 3
Output capacitance Coss 1250 pF VDS = -10 V, VGS = 0 V, f = 300 kHz 3
Switching time (rise time) tr 125 ns See Fig. 6.2.1 3
Switching time (turn-on time) ton 140 ns See Fig. 6.2.1 3
Switching time (fall time) tf 565 ns See Fig. 6.2.1 3
Switching time (turn-off time) toff 1900 ns See Fig. 6.2.1 3
Total gate charge Qg 230 nC VDD ≈ -32 V, VGS = -10 V, ID = -100 A 3
Gate-source charge 1 Qgs1 29 nC VDD ≈ -32 V, VGS = -10 V, ID = -100 A 3
Gate-drain charge Qgd 58 nC VDD ≈ -32 V, VGS = -10 V, ID = -100 A 3

CAD (KiCad official)

  • Symbol: XPH3R114MC
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: xph3r114mc-etched.step / xph3r114mc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xph3r114mc.step / xph3r114mc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (10 pp, sha256 b55bcc536620c0b4, retrieved 2026-10-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF