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XPD977B18

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Shenzhen Fuman Battery Management ICs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsxpd977b18factory-2.0.0extractor-text

Verified XPD977B18

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 33 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: XPD977B18 · QFN-32-EP(5x5) · 33 pins
  • ✓copper: 33 copper pads, none touching another net
  • ✓datasheet: all 33 pin names found in the 19-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-oa2dp3nk/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 33 pins = 33 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 33 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ xpd977b18.kicad_sym✓ xpd977b18.kicad_mod✓ xpd977b18.step
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XPD977B18

Shenzhen Fuman · Battery Management ICs · QFN-32-EP(5x5)

XPD977B18 from Shenzhen Fuman, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VFB input Voltage regulation port connected to the system voltage feedback point (internal reference 1.24V, RFB1 must be 100kΩ).
2 IREF passive CC loop compensation pin; leave floating if the CC function is not used.
3 CSN input Current sense negative terminal; connect to GND if unused, must not be left floating.
4 CSP input Current sense positive terminal; connect to GND if unused, must not be left floating.
5 ISP2 input Current sense positive terminal for the Type-A2 port.
6 ISP3 input Current sense positive terminal for the Type-A3 port.
7 DP3 bidirectional Type-A3 port data line DP.
8 LINK bidirectional XPD-LINK interconnect port (bus with 10kΩ resistor to ground).
9 DM3 bidirectional Type-A3 port data line DM.
10 DIS output Gate control for the external discharge NMOS.
11 AISN input Interconnect current sense negative terminal for use with non-XPD series products; connect to GND when unused.
12 AISP input Interconnect current sense positive terminal for use with non-XPD series products; connect to GND when unused.
13 USBA3 passive Type-A3 port VBUS output power.
14 GD3 output Type-A3 port PMOS switch gate drive.
15 DP2 bidirectional Type-A2 port data line DP.
16 DM2 bidirectional Type-A2 port data line DM.
17 USBA2 passive Type-A2 port VBUS output power.
18 GD2 output Type-A2 port PMOS switch gate drive.
19 CC1 bidirectional Type-C port configuration channel CC1 (rated up to 26V abs max).
20 DP1 bidirectional Type-C port data line (table text labels it DM; named DP1).
21 DM1 bidirectional Data line DM1 of the Type-C port (table text labels it Type-A port DP).
22 CC2 bidirectional Type-C port configuration channel CC2 (rated up to 26V abs max).
23 VBUS power_out Type-C port VBUS output power through integrated 10mΩ switch (pins 23/24/25 common); VBUS capacitor max 10µF.
24 VBUS power_out Type-C port VBUS output power through integrated 10mΩ switch (pins 23/24/25 common); VBUS capacitor max 10µF.
25 VBUS power_out Type-C port VBUS output power through integrated 10mΩ switch (pins 23/24/25 common); VBUS capacitor max 10µF.
26 NC unconnected No connect, left floating.
27 NC unconnected No connect, left floating.
28 VPWR power_in Input power supply for the chip, 3.3V to 21V recommended range (pins 28/29/30 common).
29 VPWR power_in Input power supply for the chip, 3.3V to 21V recommended range (pins 28/29/30 common).
30 VPWR power_in Input power supply for the chip, 3.3V to 21V recommended range (pins 28/29/30 common).
31 NC unconnected No connect, left floating.
32 OPTO output Optocoupler drive output, withstands 20V or more.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Shenzhen Fuman
Package QFN-32-EP(5x5)
Category Power Management ICs
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Absolute max voltage VPWR, VBUS, VBUSA, CC1, CC2, DP1, DM1, DP2, DM2, OPTO -0.3 26 V 8
Absolute max voltage other pins -0.3 7 V 8
Junction temperature -40 150 ℃ 8
Storage temperature -65 150 ℃ 8
ESD HBM VESD -4000 4000 V HBM 8
VPWR input voltage VPWR 3.3 21 V 8
VBUS capacitance CVBUS 1 10 µF 8
VPWR capacitance CVPWR 1 10 µF 8
Operating ambient temperature TA -40 85 ℃ 8
Junction-to-ambient thermal resistance RθJA 34 C/W QFN32 8
Junction-to-case(top) thermal resistance RθJCtop 32 C/W QFN32 8
Junction-to-board thermal resistance RθJB 10 C/W QFN32 8
VPWR UVLO rising VVPWR_TH 3.3 V Rising edge 9
VPWR UVLO falling VVPWR_TH 2.9 V Falling edge 9
VPWR UVLO hysteresis VVPWR_TH 0.4 V Hysteresis 9
Operating current ISUPP 2 mA VPWR=5V, VBUS=5V 9
Transmit output resistance RTX 50 Ω During transmission 9
Transmit LOW VTXLO -75 75 mV 9
BMC rise/fall time tBMC 300 600 ns Rload=5.1k,Cload=1nF 9
Receive HIGH VRXHI 800 840 885 mV 9
Receive LOW VRXLO 485 525 570 mV 9
CC broadcasting current 3A IRP_SRC 304 330 356 uA 3A DFP mode, 0 ≤ VCCX ≤ 2.5V 9
CC broadcasting current 1.5A IRP_SRC 166 180 194 uA 1.5A DFP mode, 0 ≤ VCCX ≤ 1.5V 9
Over-temperature threshold TJ1 135 145 155 ℃ Temperature rising edge 9
Data line detect voltage VDAT(REF) 0.25 0.325 0.4 V 9
Output voltage select VSEL(REF) 1.8 2 2.2 V 9
D+ high glitch filter time TGLITCH(DP)HIGH 1 1.25 1.5 s 9
Output voltage glitch filter time TGLITCH(V)CHANGE 20 40 60 ms 10
Continuous mode glitch filter time TGLITCH(CONT)CHANGE 100 150 200 us 10
D+ leakage resistance RDAT(LKG) 300 500 800 KΩ 10
D- pull-down resistance RDM(DWN) 14.25 19.53 24.5 KΩ 10
Switch N1 on-resistance RON(N1) 100 Ω 10
PD attach detect voltage threshold VTH(PD) 0.25 0.325 0.4 V 10
PD attach detect filter time TDPD 120 160 200 ms 10
Apple 2.4A data line voltage VDAT(2.7V) 2.57 2.7 2.84 V 10
Switch MOSFET on-resistance RDSON 10 mΩ 9
Type-A overcurrent trip VITRIP 3.6 A USB-A 9
Constant current point ICC 3.3 A 9
Recommended RS1 RS1 10 mΩ 8

CAD (KiCad official)

  • Symbol: XPD977B18
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: xpd977b18-etched.step / xpd977b18-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xpd977b18.step / xpd977b18.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen Fuman datasheet (19 pp, sha256 5a87c34d62e6ac88, retrieved 2026-10-30, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF