XPD977B

@@ -0,0 +1,89 @@+# XPD977B++**Shenzhen Fuman** · Battery Management · QFN-32-EP(5x5)++XPD977B from Shenzhen Fuman, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VFB | input | Voltage-regulation feedback input. Connects to the system output-voltage divider tap (typ. R_FB1=100kΩ / R_FB2=33kΩ) for dynamic PD/QC output-voltage regulation. |+| 2 | IREF | passive | CC (constant-current) loop compensation pin. Recommended RC network R_CMP2=10kΩ, C_CMP2=10nF. Leave floating if the CC function is unused. |+| 3 | CSN | input | Main current-sense negative input. Must be tied to GND when unused; do not leave floating. Works with the internal 10 mΩ sense resistor / external R_S1 (10 mΩ). |+| 4 | CSP | input | Main current-sense positive input. Must be tied to GND when unused; do not leave floating. |+| 5 | ISP2 | input | Type-A2 port current-sense positive input (with external R_S2 = 5 mΩ). Used for per-port current limiting on A2 output. |+| 6 | ISP3 | input | Type-A3 port current-sense positive input (with external R_S3 = 5 mΩ). Used for per-port current limiting on A3 output. |+| 7 | DP3 | bidirectional | Type-A3 port USB D+ data line. Handles QC/FCP/AFC/Apple 2.4A/BC1.2 handshake on port A3. |+| 8 | LINK | bidirectional | XPD-LINK™ inter-chip interconnection bus. Enables multi-XPD-chip cooperative operation across ports; pull to GND via R_LINK = 10 kΩ. |+| 9 | DM3 | bidirectional | Type-A3 port USB D− data line. |+| 10 | DIS | output | External discharge NMOS gate drive. Drives an external N-MOSFET that discharges VBUS/VPWR bulk capacitors during voltage step-down transitions. |+| 11 | AISN | input | XPD-LINK interconnect current-sense negative input (used when interworking with non-XPD-series parts). Tie to GND if unused. |+| 12 | AISP | input | XPD-LINK interconnect current-sense positive input (used when interworking with non-XPD-series parts). Tie to GND if unused. |+| 13 | USBA3 | power_out | Type-A3 port VBUS output rail (post external PMOS switch). |+| 14 | GD3 | output | Type-A3 port external PMOS gate driver. Requires C_GATE2 = 47 nF GS capacitor. |+| 15 | DP2 | bidirectional | Type-A2 port USB D+ data line. |+| 16 | DM2 | bidirectional | Type-A2 port USB D− data line. |+| 17 | USBA2 | power_out | Type-A2 port VBUS output rail (post external PMOS switch). |+| 18 | GD2 | output | Type-A2 port external PMOS gate driver. Requires C_GATE1 = 47 nF GS capacitor. |+| 19 | CC1 | bidirectional | Type-C port CC1 configuration channel. Handles USB PD3.0 BMC PHY and orientation detection. |+| 20 | DP1 | bidirectional | Type-C port USB D-line (datasheet text labels this pin's function as 'Type-C 口数据端口 DM' despite the DP1 name). |+| 21 | DM1 | bidirectional | Type-A port USB D-line (datasheet text labels this pin's function as 'Type-A 口数据端口 DP' despite the DM1 name). |+| 22 | CC2 | bidirectional | Type-C port CC2 configuration channel. |+| 23 | VBUS | power_out | Type-C port VBUS output rail (integrated 10 mΩ switch). Pins 23/24/25 are tied internally. |+| 24 | VBUS | power_out | Type-C port VBUS output rail (integrated 10 mΩ switch). Pins 23/24/25 are tied internally. |+| 25 | VBUS | power_out | Type-C port VBUS output rail (integrated 10 mΩ switch). Pins 23/24/25 are tied internally. Recommend C_VBUS 1-10 µF. |+| 26 | NC | unconnected | No connect. Leave floating. |+| 27 | NC | unconnected | No connect. Leave floating. |+| 28 | VPWR | power_in | Main input supply (3.3 V to 21 V; absolute max 26 V). Pins 28/29/30 are tied internally. Recommend C_VPWR 1-10 µF. |+| 29 | VPWR | power_in | Main input supply (3.3 V to 21 V). Pins 28/29/30 are tied internally. |+| 30 | VPWR | power_in | Main input supply (3.3 V to 21 V). Pins 28/29/30 are tied internally. |+| 31 | NC | unconnected | No connect. Leave floating. |+| 32 | OPTO | output | Optocoupler driver output for AC-DC primary-side feedback control loop. |+| 33 | GND | power_in | Exposed thermal pad - chip ground (EPAD). Must be soldered to the PCB ground plane for both electrical return and heat dissipation (R_θJA ≈ 34 °C/W). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Shenzhen Fuman |+| Package | QFN-32-EP(5x5) |+| Category | PMIC |+| Pins | 33 |++## Ordering variants++- `XPD977B18`+- `XPD977BP18`+- `XPD977BXPD977A`+- `XPD977B`+- `XPD977BV`+- `XPD977BXPD977D30A`+- `XPD977BXPD977D30`+- `XPD977BXPD977DP30`+- `XPD977BXPD977D45`+- `XPD977BXPD977DP45`+- `XPD977BXPD977D60`+- `XPD977BXPD977DP60`+- `XPD977BXPD977D65`+- `XPD977BXPD977DP65`+- `XPD977BXPD977D6545`+- `XPD977BXPD977DP6545`+- `XPD977BXPD977D6518`++## CAD (KiCad official)++- Symbol: `XPD977B`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Shenzhen Fuman datasheet](docs/xpd977b-datasheet.pdf) (19 pp, sha256 `5a87c34d62e6ac88`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/xpd977b-datasheet.pdf)